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From: Michael Nolan <mtnolan2640@gmail.com>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: [libre-riscv-dev] MMU + TLB idea
Date: Thu, 7 May 2020 19:39:08 -0400
Message-ID: <6a63afa2-f425-9490-be9f-a05e34cadc9c@gmail.com> (raw)

I remember some time ago working on a powerpc core that (I think) had a 
partly software MMU. It got me thinking: we could have a TLB and the 
machinery to look up entries in it and translate the addresses in 
hardware, and implement the page table walking and such in software (via 
a trap). This would I think cut down the work in implementing the MMU by 
making it so we don't need to implement the page table walking machinery 
in hardware, and make it a bit easier to test. The downside of course 
would be that TLB misses would be slower, but I think it might be a 
decent trade-off for our first attempt at the MMU.

Thoughts?

--Michael


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Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-07 23:39 Michael Nolan [this message]
2020-05-08  0:40 ` Luke Kenneth Casson Leighton

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