[libre-riscv-dev] daily status update 05may2020
2020-05-05 10:47 UTC - mbox.gz / Atom
[libre-riscv-dev] [Bug 216] LOAD STORE buffer needed
2020-05-04 20:11 UTC (11+ messages) - mbox.gz / Atom
[libre-riscv-dev] Merging Repositories and Auto-Generating Static Documentation
2020-05-04 13:14 UTC (6+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 300] New: Documentation for the SOC
2020-05-04 13:12 UTC (2+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 300] Documentation for the SOC "
[libre-riscv-dev] global network of developers
2020-05-04 9:29 UTC - mbox.gz / Atom
[libre-riscv-dev] [Bug 296] New: idea: cyclic buffer between FUs and register file
2020-05-03 14:07 UTC (16+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 296] idea: cyclic buffer between FUs and register file "
[libre-riscv-dev] GItlab For SOC repo
2020-05-03 11:02 UTC (5+ messages) - mbox.gz / Atom
` [libre-riscv-dev] experimental code & monorepo
[libre-riscv-dev] Documenting the SOC tree Repository
2020-05-03 0:21 UTC (8+ messages) - mbox.gz / Atom
[libre-riscv-dev] Needed Subset of POWER
2020-05-02 23:34 UTC (2+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V
2020-05-02 5:28 UTC (2+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 299] New: improve memory clash detection
2020-05-01 23:39 UTC - mbox.gz / Atom
[libre-riscv-dev] [Bug 298] New: consider using sum-addressed decoder in L1 cache (maybe also L1 I cache)
2020-05-01 23:21 UTC (2+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 298] consider using sum-addressed decoder in L1 cache (maybe also L1 I cache) "
[libre-riscv-dev] [Bug 297] New: nmutil "flatten" function already exists
2020-05-01 23:04 UTC (7+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 297] nmutil "flatten" function already exists "
[libre-riscv-dev] Verilog book
2020-05-01 21:43 UTC (2+ messages) - mbox.gz / Atom
[libre-riscv-dev] sum-addressed decoder
2020-05-01 19:09 UTC (2+ messages) - mbox.gz / Atom
[libre-riscv-dev] sun opensparc t2
2020-05-01 13:22 UTC (2+ messages) - mbox.gz / Atom
[libre-riscv-dev] load/store execution queue idea
2020-05-01 11:24 UTC (2+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 295] New: pay attention to these insights
2020-04-30 22:44 UTC (2+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 295] pay attention to these insights "
[libre-riscv-dev] [Bug 257] Implement demo Load/Store queueing algorithm
2020-04-29 21:39 UTC (9+ messages) - mbox.gz / Atom
[libre-riscv-dev] memory interface diagram woes
2020-04-29 15:10 UTC (22+ messages) - mbox.gz / Atom
` [libre-riscv-dev] circuitjs
` [libre-riscv-dev] HTTaP and Design for Test (was Re: circuitjs)
[libre-riscv-dev] [Bug 171] partitioned comparison operators
2020-04-29 8:59 UTC (2+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 132] SIMD-like nmigen signal for partitioning
2020-04-29 8:59 UTC (2+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 162] Formally Verify the FSGNJ module
2020-04-29 8:56 UTC (2+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 196] Formal correctness proof needed for the IEEE754 FPU
2020-04-29 8:56 UTC (4+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 294] New: usage statistics needed for POWER9 architecture
2020-04-29 8:55 UTC - mbox.gz / Atom
[libre-riscv-dev] [Bug 293] New: evaluate an online circuit-editor (with simulator preferably)
2020-04-28 14:56 UTC (2+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 293] evaluate an online circuit-editor (with simulator preferably) "
[libre-riscv-dev] [Bug 163] Formally Verify the FPMAX module
2020-04-27 20:45 UTC (2+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 165] Formally verify the FPCMP (FEQ, FLE, FLT) module
2020-04-27 20:44 UTC (2+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 211] formal proof of PowerDecoder stage2 needed
2020-04-27 20:38 UTC - mbox.gz / Atom
[libre-riscv-dev] [Bug 198] Formal correctness proofs are needed for low-level libraries in LibreSOC
2020-04-27 20:38 UTC - mbox.gz / Atom
[libre-riscv-dev] [Bug 269] auto-conversion / parser of POWER ISA Spec v3.0B
2020-04-27 20:29 UTC (3+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 241] OpenPOWER SImulation is needed of standards
2020-04-27 20:29 UTC (2+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 272] functions needed in POWER simulator which match 3.0B spec
2020-04-27 20:25 UTC - mbox.gz / Atom
[libre-riscv-dev] [Bug 189] Create partitioned right shift using the existing partitioned left shift
2020-04-27 20:23 UTC - mbox.gz / Atom
[libre-riscv-dev] [Bug 172] partitioned signal add/sub/neg
2020-04-27 20:22 UTC - mbox.gz / Atom
[libre-riscv-dev] [Bug 173] dynamic partitioned "shift"
2020-04-27 20:18 UTC - mbox.gz / Atom
[libre-riscv-dev] morphing 6600 code to use power decoder
2020-04-24 20:11 UTC (15+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 292] New: implement multi-way read/write 6600 signals
2020-04-24 14:39 UTC (4+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 292] implement multi-way read/write 6600 signals "
[libre-riscv-dev] [Bug 81] implement 6600-style "precise" out-of-order scoreboard
2020-04-24 14:38 UTC - mbox.gz / Atom
[libre-riscv-dev] scammers looking for access to NLNet Funds
2020-04-23 17:04 UTC - mbox.gz / Atom
[libre-riscv-dev] [Bug 288] New: intro post for powerpc-notebook.org and https://www.powerprogress.org/en/
2020-04-22 19:42 UTC (9+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 288] intro post for powerpc-notebook.org and https://www.powerprogress.org/en/ "
[libre-riscv-dev] [Bug 217] create a "ring" system which allows pad locations to be specified conveniently
2020-04-21 22:21 UTC (30+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 291] New: HDL Workflow and Coriolis2 chroot automated setup scripts
2020-04-21 21:46 UTC (2+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 291] HDL Workflow and Coriolis2 chroot automated setup scripts "
[libre-riscv-dev] [Bug 178] first coriolis2 tutorial, workflow and "test project" page
2020-04-21 21:35 UTC (6+ messages) - mbox.gz / Atom
[libre-riscv-dev] Yosys cxxrtl
2020-04-21 16:30 UTC (2+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 290] New: import error caused by soc.decoder.isa.all no longer being generated
2020-04-21 11:15 UTC (9+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 290] import error caused by soc.decoder.isa.all no longer being generated "
[libre-riscv-dev] [Bug 208] implement CORDIC in a general way sufficient to do transcendentals
2020-04-20 22:43 UTC (2+ messages) - mbox.gz / Atom
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