[libre-riscv-dev] [Bug 325] New: create POWER9 TRAP pipeline
2020-06-04 0:29 UTC (21+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 325] create POWER9 TRAP pipeline "
[libre-riscv-dev] daily kan-ban update 03jun2020
2020-06-04 0:09 UTC (5+ messages) - mbox.gz / Atom
[libre-riscv-dev] Move FHDLTestCase to our utils folder
2020-06-03 23:46 UTC (3+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 329] New: coriolis2 experiment layout for Dependency Matrices
2020-06-03 22:18 UTC (3+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 329] coriolis2 experiment layout for Dependency Matrices "
[libre-riscv-dev] regfile-to-function-unit connection taking shape
2020-06-03 19:21 UTC - mbox.gz / Atom
[libre-riscv-dev] [Bug 361] New: all test_pipe_caller.py needs RA=0 tests
2020-06-03 12:00 UTC - mbox.gz / Atom
[libre-riscv-dev] googleusercontent looks like it got hacked yesterday
2020-06-03 10:08 UTC - mbox.gz / Atom
[libre-riscv-dev] microwatt decoder tables: M-Form and X-Form switched RS and RB
2020-06-03 1:28 UTC (6+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [OpenPOWER-HDL-Cores] microwatt decoder tables: M-Form and X-Form switched RS and RB "
[libre-riscv-dev] daily kan-ban update 02jun2020
2020-06-02 23:16 UTC (11+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 336] New: add indicator to Decode2ExecuteType that RA is zero
2020-06-02 23:06 UTC (11+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA (src1) can be zero
[libre-riscv-dev] daily kan-ban update 01jun2020
2020-06-02 23:05 UTC (15+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 313] New: Create Branch Pipeline for POWER9
2020-06-02 22:41 UTC (12+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 313] Create Branch Pipeline for POWER9 "
[libre-riscv-dev] [Bug 216] LOAD STORE buffer needed
2020-06-02 18:26 UTC (9+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 353] New: formal proof of soc.regfile classes RegFile and RegFileArray needed
2020-06-02 12:27 UTC (25+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 353] formal proof of soc.regfile classes RegFile and RegFileArray needed "
[libre-riscv-dev] [Bug 305] New: Create Pipelined ALU similar to alu_hier.py
2020-06-01 23:24 UTC (2+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 305] Create Pipelined ALU similar to alu_hier.py "
[libre-riscv-dev] [Bug 358] New: new MCU-ALU test picked up RC / OE / CR handling issue
2020-06-01 23:24 UTC (5+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 358] new MCU-ALU test picked up RC / OE / CR handling issue "
[libre-riscv-dev] [Bug 360] New: move RS to 1st or 2nd operand in CSV files
2020-06-01 21:41 UTC (2+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 360] move RS to 1st or 2nd operand in CSV files "
[libre-riscv-dev] [Bug 339] New: create POWER9 ROTATE pipeline
2020-06-01 20:17 UTC (6+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 339] create POWER9 ROTATE (SHIFTROT) pipeline
[libre-riscv-dev] [Bug 300] New: Documentation for the SOC
2020-06-01 19:16 UTC (2+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 300] Documentation for the SOC "
[libre-riscv-dev] Named Records in nMigen
2020-06-01 10:15 UTC (4+ messages) - mbox.gz / Atom
[libre-riscv-dev] more pipeline instructions needed
2020-06-01 2:03 UTC - mbox.gz / Atom
[libre-riscv-dev] daily kan-ban update 31may2020
2020-05-31 22:14 UTC (4+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 359] New: cut down on wires between decode and function units
2020-05-31 17:46 UTC - mbox.gz / Atom
[libre-riscv-dev] daily kan-ban update 30may2020
2020-05-30 22:06 UTC (5+ messages) - mbox.gz / Atom
[libre-riscv-dev] Request for Scoreboard and Functional Units Update
2020-05-30 21:34 UTC (5+ messages) - mbox.gz / Atom
[libre-riscv-dev] MultiCompUnit- ALU interaction. was: daily kan-ban update 30may2020
2020-05-30 19:05 UTC (4+ messages) - mbox.gz / Atom
[libre-riscv-dev] EU residency / businesses
2020-05-30 9:58 UTC - mbox.gz / Atom
[libre-riscv-dev] daily kan-ban update 29may2020
2020-05-29 23:58 UTC (9+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 263] LD/ST batching needed
2020-05-29 13:56 UTC - mbox.gz / Atom
[libre-riscv-dev] [Bug 357] New: create simplified (testing) version of Function Unit pipeline for test purposes
2020-05-29 13:49 UTC - mbox.gz / Atom
[libre-riscv-dev] [Bug 310] New: Function Units to cover multiple tasks
2020-05-29 13:42 UTC (2+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 310] Function Units to cover multiple tasks "
[libre-riscv-dev] minimum viable ASIC
2020-05-29 10:30 UTC (8+ messages) - mbox.gz / Atom
` [libre-riscv-dev] Debug port (was Re: minimum viable ASIC)
[libre-riscv-dev] Rough Architectural Sketch
2020-05-29 2:45 UTC (2+ messages) - mbox.gz / Atom
[libre-riscv-dev] daily kan-ban update 28may2020
2020-05-28 23:53 UTC (11+ messages) - mbox.gz / Atom
[libre-riscv-dev] openpower virtual coffee call 28may2020, 90 minutes time
2020-05-28 21:59 UTC (8+ messages) - mbox.gz / Atom
[libre-riscv-dev] [Bug 348] New: POWER9 SPR pipeline needed
2020-05-28 16:20 UTC (2+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 348] POWER9 SPR pipeline needed "
[libre-riscv-dev] [Bug 331] New: Formal Correctness Proof for LOGICAL pipeline
2020-05-28 15:41 UTC (2+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 331] Formal Correctness Proof for LOGICAL pipeline "
[libre-riscv-dev] [Bug 347] New: add setb (to CR pipeline?)
2020-05-28 15:39 UTC (2+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 347] add setb (to CR pipeline?) "
[libre-riscv-dev] Fwd: power-gem5
2020-05-28 12:02 UTC - mbox.gz / Atom
[libre-riscv-dev] [Bug 334] New: POWER decode A=zero needs to be set as a flag in Execute1Type
2020-05-28 10:44 UTC (2+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 334] POWER decode A=zero needs to be set as a flag in Execute1Type "
[libre-riscv-dev] [Bug 350] New: LDSTCompUnit also needs to support zeroing on RA
2020-05-28 10:44 UTC (2+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 350] LDSTCompUnit also needs to support zeroing on RA "
[libre-riscv-dev] [Bug 356] New: fu POWER9 pipeline unit tests need to test RA=0
2020-05-28 10:44 UTC (2+ messages) - mbox.gz / Atom
` [libre-riscv-dev] [Bug 356] fu POWER9 pipeline unit tests need to test RA=0 "
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