Libre RISC-V Mailing list Archives (accessible via public-inbox)
 help / color / Atom feed
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] Who Buys Talos Workstations?
Date: Mon, 6 Apr 2020 11:49:36 +0100
Message-ID: <CAPweEDw15n4fYtiSptZJCV0m+SLBdkh0_CRi4nZdx5KTgdaBtg@mail.gmail.com> (raw)
In-Reply-To: <C9CF1146-A034-44EF-9379-366EE8414F28@gatech.edu>

On Mon, Apr 6, 2020 at 7:46 AM Immanuel, Yehowshua U
<yimmanuel3@gatech.edu> wrote:
>
> As mentioned earlier, I’ve been having some meetings at the startup school Create-X and one of the topics that comes up frequently concerns target markets, who else has had success in our space, and competitors.

whenever i have had conversations with people about EOMA68, that they
can instead of moving the *data* from device to device, move the
*computer* from device to device (Memory Card pause Computer Card)
they absolutely get it and are delighted and really enthusiastic and
supportive.

in the current world environment that becomes even more important.

the Intel Compute Card project only failed because Intel tried shoving
*hardware-level encryption* into the specification.  if you look up
NexDock's story, Chinese ODMs completely failed to be able to cope
with the "changes" required - the differences between this
insanely-complex requirement and what they normally "cookie-cut clone
and shove out the door", at the **BIOS** level.

USD 250,000 wasted later, NexDock, the *only* company to publicly tell
people that they were doing an Intel Compute Card product, gave up.

simplicity is key.  EOMA68 comprises 68 pins, being an Aggregation
Standard: a standard that aggregates *other* standards, those
standards (USB3, I2C, SD/MMC) being *decades* old *well-established*
and simple standards.

start small, think big.

l.

_______________________________________________
libre-riscv-dev mailing list
libre-riscv-dev@lists.libre-riscv.org
http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev

      reply index

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-05  1:52 Immanuel, Yehowshua U
2020-04-05  5:55 ` Lauri Kasanen
2020-04-05  7:34   ` Cole Poirier
2020-04-05 10:13     ` Luke Kenneth Casson Leighton
2020-04-05 22:45       ` Immanuel, Yehowshua U
2020-04-06  1:43         ` Luke Kenneth Casson Leighton
2020-04-06  6:46           ` Immanuel, Yehowshua U
2020-04-06 10:49             ` Luke Kenneth Casson Leighton [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAPweEDw15n4fYtiSptZJCV0m+SLBdkh0_CRi4nZdx5KTgdaBtg@mail.gmail.com \
    --to=lkcl@lkcl.net \
    --cc=libre-riscv-dev@lists.libre-riscv.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

Libre RISC-V Mailing list Archives (accessible via public-inbox)

Archives are clonable: git clone --mirror https://inbox.libre-soc.org/libre-riscv-dev

Example config snippet for mirrors


AGPL code for this site: git clone https://public-inbox.org/public-inbox.git