From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] daily kan-ban update 18may2020
Date: Mon, 18 May 2020 20:21:07 +0100
Message-ID: <CAPweEDwdugwSU=y=qDfjAGaeJ-3JBGiqH-ZT29dogu3Ko1HH9Q@mail.gmail.com> (raw)
In-Reply-To: <20200518201840.f98bff75f9f55216f486be59@platen-software.de>
On Mon, May 18, 2020 at 7:18 PM Tobias Platen
<libre-soc@platen-software.de> wrote:
> Today I was reading and trying to understand Chapter 2. Branch Facility.
you mean section 11.5.1 of Mitch's book? it's very simple: the Branch
Function Unit holds a "shadow" - write-hazard - over anything that is
added after the Branch instruction was issued. this "shadow" hooks
into all GO_WRITE phases of all instructions so "shadowed". this
allows those units to *generate* results but NOT write them.
that Branch Unit may have a register it needs to read which happens to
be blocked because another (past) unit - one that was issued *before*
the branch - is due to write to it. therefore, quite a few
instructions may build up with that "shadow" preventing them from
writing.
eventually, the register that the Branch Unit is waiting for will be
written to. at that point, the Branch Unit can compute the outcome of
the Branch. if it was "correct as predicted", the "shadow" is simply
dropped: all units with write-blocks now demand access to Regfile (and
memory).
if however it was wrong, the "GO_DIE" signal of the Shadow is pulled,
all those results get trashed immediately, and the Branch Unit sets a
new PC, down the "other" path, with new instruction issue beginning
from that new (correct) point.
so, to reiterate:
* some prior instructions happen to write to registers that the Branch
needs. this takes time
* the Branch is issued with
(A) a "Read-after-Write" Hazard on the instruction that is writing
to the register it needs and
(B) a "Shadow" enabled which activates on *any* future instruction
* future instructions note that shadow and DISABLE "write commit"
capability but CONTINUE execution
* Branch Unit eventually gets the register it needs, completes its
decision-making, and either pulls "OK" or "DIE" on the Shadow.
it's pretty straightforward.
the exact same scheme is used for exceptions, interrupts and predication.
necessary modifications to the diagram on p55 are shown here:
https://libre-soc.org/3d_gpu/shadow.jpg
l.
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Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-18 11:45 Luke Kenneth Casson Leighton
2020-05-18 18:18 ` Tobias Platen
2020-05-18 19:21 ` Luke Kenneth Casson Leighton [this message]
2020-05-19 12:30 ` Staf Verhaegen
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