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From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] daily kan-ban 07may2020 update
Date: Thu, 7 May 2020 19:55:05 +0100
Message-ID: <CAPweEDxqtqbx3fcmhctTu8C3LbJdyYknxUcLmOp4TpOkrrrHVw@mail.gmail.com> (raw)
In-Reply-To: <1e472501-2473-6be6-f959-8c1806d7c37a@gmail.com>

On Thursday, May 7, 2020, Michael Nolan <mtnolan2640@gmail.com> wrote:

> I'm continuing working on the power_pseudo simulator, I think I have the
> condition registers working now. I think carry and overflow handling is
> next.


great.

i could really do with understanding the relationship between condition
registers and branches.

that will allow me to start the Branch Computation Unit.

except probably first i'd need to do the Condition Regfile.

l
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  parent reply index

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-07 10:26 Luke Kenneth Casson Leighton
2020-05-07 18:25 ` Michael Nolan
2020-05-07 18:48   ` Tobias Platen
2020-05-07 18:55   ` Luke Kenneth Casson Leighton [this message]
2020-05-07 23:23 ` Jacob Lifshay
2020-05-07 23:28   ` Yehowshua
2020-05-08  2:26   ` Luke Kenneth Casson Leighton
2020-05-08  8:41     ` Staf Verhaegen
2020-05-08  8:51       ` Yehowshua
2020-05-08  9:08       ` Luke Kenneth Casson Leighton
2020-05-08 10:46         ` Luke Kenneth Casson Leighton
2020-05-08 11:02         ` Staf Verhaegen
2020-05-08 11:18           ` Luke Kenneth Casson Leighton

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