From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] daily kan-ban update 22may2020
Date: Sat, 23 May 2020 12:03:31 +0100
Message-ID: <CAPweEDyK8CMDn5KWJNr7rvF--x7TObo3Gs0rzgZ3k_w26QxhOQ@mail.gmail.com> (raw)
In-Reply-To: <5c96dbc3-3893-717a-6bea-5f2a9f8c3c5c@gmail.com>
On Sat, May 23, 2020 at 11:24 AM Cesar Strauss <cestrauss@gmail.com> wrote:
>
> On 05/22/2020 23:41, Luke Kenneth Casson Leighton wrote:
> > and even in FPGA, one that had good number crunching capability might be
> > useful, i assume.
> >
>
> If you mean a libre FPGA, I am all for it.
:)
> I think there are experimental FPGAs developed in academia, but not
> reaching commercial availability.
yes we found one a few months ago, written in chisel (!) and
considered putting it into silicon. however it is a big project in
its own right, you'd have to go through the full business case
justification and properly commit to it.
l.
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Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-22 15:02 Luke Kenneth Casson Leighton
2020-05-22 15:19 ` Michael Nolan
2020-05-22 15:39 ` Luke Kenneth Casson Leighton
2020-05-22 19:10 ` Cole Poirier
2020-05-22 19:18 ` Tobias Platen
2020-05-22 19:33 ` Luke Kenneth Casson Leighton
2020-05-23 1:56 ` Cesar Strauss
2020-05-23 2:41 ` Luke Kenneth Casson Leighton
2020-05-23 10:24 ` Cesar Strauss
2020-05-23 11:03 ` Luke Kenneth Casson Leighton [this message]
2020-05-23 11:53 ` Cesar Strauss
2020-05-23 12:08 ` Luke Kenneth Casson Leighton
2020-05-23 18:16 ` Cole Poirier
2020-05-22 19:59 ` Jacob Lifshay
2020-05-22 20:04 ` Luke Kenneth Casson Leighton
2020-05-22 20:12 ` Luke Kenneth Casson Leighton
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