From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] Documenting the SOC tree Repository
Date: Sat, 2 May 2020 05:40:39 +0100
Message-ID: <CAPweEDz8W8SsEVuZiLReHCH763LBriSWSOjs+pTMpgUo061gXA@mail.gmail.com> (raw)
In-Reply-To: <27116EB9-8FC7-4043-8328-ED7516EE6641@gatech.edu>
On Saturday, May 2, 2020, Yehowshua <yimmanuel3@gatech.edu> wrote:
> I’m reading the rather large SOC repository right now.
it's not that biig. err is it?
the IEEE754FPU one i know is around 10,000 lines. as python projects go
that's pretty small.
I’m creating documentation as I go along.
fantastic. i do recommend leaving out minerva except perhaps some
commentary about it at the top level, that we intend to borrow its use of
wishbone and its L1 I and D cache code, to save on both development and
unit test time.
in particular it has a formal correctness proof for the L1 cache.
sadly we didn't yet put in an NLNet grant request to cover documentation,
which we still could do if you like?
one suggestion / request, if you create a page to describe some classes
(whatever) please do cross-reference them *in the actual code*.
make sure to commit and push pretty much immediately. under no
circumstances go "i'll commit these and wait a few days before pushing
them".
> This may take a few weeks.
not a surprise.
l.
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Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-02 3:09 Yehowshua
2020-05-02 4:40 ` Luke Kenneth Casson Leighton [this message]
2020-05-02 4:42 ` Yehowshua
2020-05-02 20:59 ` Yehowshua
2020-05-02 23:24 ` Luke Kenneth Casson Leighton
2020-05-03 0:08 ` Yehowshua
2020-05-03 0:09 ` Yehowshua
2020-05-03 0:21 ` Luke Kenneth Casson Leighton
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