From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] daily kan-ban update 11may2020
Date: Tue, 12 May 2020 11:06:52 +0100
Message-ID: <CAPweEDzk6FtCcH05GthZk+XkfK3y8kLAa8KAC2iktwkhWARVuQ@mail.gmail.com> (raw)
In-Reply-To: <e9c73bc6-4709-3aa3-8e3e-2f061a352820@gmail.com>
On Mon, May 11, 2020 at 2:32 PM Michael Nolan <mtnolan2640@gmail.com> wrote:
> On 5/11/20 8:26 AM, Luke Kenneth Casson Leighton wrote:
> > btw i forgot to mention: here's what kan-ban is supposed to be :)
> > https://en.wikipedia.org/wiki/Kanban_(development)
> Well that explains some things. When I googled it I came up with the
> manufacturing version and was rather confused what that had to do with us.
i worked for a company that introduced the S/W Engineering version, it
went quite well: made progress (or lack of) quite obvious, and that
really helped to guide decisions.
> Yesterday (and saturday) I worked on the integer ALU adding support for
> shifts and rotates. Today I'd like to improve the ALU testbench some, so
i saw the massive speed-up. instead of a couple of minutes it's now a
few seconds.
> instead of blindly reading and writing registers based on hardcoded
> numbers it actually looks at the ones used by the instruction.
> (Basically, have it simulate the register file). I'd also like to add in
> support for carry, overflow, and condition registers.
saw the addition of the SPRs go by.
looks good, michael.
l.
> --Michael
>
>
>
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Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-11 12:26 Luke Kenneth Casson Leighton
2020-05-11 13:32 ` Michael Nolan
2020-05-12 10:06 ` Luke Kenneth Casson Leighton [this message]
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