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From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: [libre-riscv-dev] LD/ST now a bit better. extra NLNet budgets
Date: Thu, 11 Jun 2020 20:18:19 +0100
Message-ID: <CAPweEDztP=w8qcBc8SiDX8O7WGOcMAsRQY4ibea=hoBzvzJbXg@mail.gmail.com> (raw)

hi folks,

i have the LD/ST CompUnit FSM closer to acceptably operational.  i had
to add some very bad hacks in to get it to work, and also into the
L0CacheBuffer.  luckily the prototype L0CacheBuffer is not intended
for heavy production, it's there as a stop-gap measure.

also we have three additional tasks that have been verbally approved,
kindly, by Michiel from NLNet:

* nmigen and yosys funding: EUR 10,000
* POWER9 core funding: EUR 8,000
* SoC Documentation funding: EUR 6,000

we were running particularly low on the development of the POWER9
core, because (a) it is more complex than RV64GC (b) the core is
covered by the original (first) NLNet Grant, applied for in Nov 2018,
and (c) a full half of that first EUR 50,000 budget was allocated to
Kazan.

this is good news for everyone who has completed tasks in the past 2
months on the POWER9 core because now it will be possible (once the
MoU is signed) to give you donations for completing them.

l.

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Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-11 19:18 Luke Kenneth Casson Leighton [this message]
2020-06-11 19:32 ` Yehowshua
2020-06-11 19:41   ` Luke Kenneth Casson Leighton
2020-06-11 20:56     ` [libre-riscv-dev] Kazan status Jacob Lifshay
2020-06-12  5:52       ` Lauri Kasanen
2020-06-12  7:11       ` Anton Bondarev
2020-06-12 11:27         ` Luke Kenneth Casson Leighton

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