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From: bugzilla-daemon@libre-riscv.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 174] NLNet 2019 Formal Standards OpenPOWER proposal 2019-10-046
Date: Fri, 13 Mar 2020 12:41:05 +0000
Message-ID: <bug-174-13-gsTQnBdF4K@http.bugs.libre-riscv.org/> (raw)
In-Reply-To: <bug-174-13@http.bugs.libre-riscv.org/>

http://bugs.libre-riscv.org/show_bug.cgi?id=174

--- Comment #4 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
# SimpleV

Budget: EUR 8000

# ISAMUX/NS 

Budget: 2500

# Atomics

Budget: 2500

# Variable Encoding

Budget: 2500

# Compressed

Budget: 5000

# FP16

Budget: 2500

# ISA Switch (POWER-RV64GC)

Budget: 3000

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Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <bug-174-13@http.bugs.libre-riscv.org/>
2020-03-13 12:41 ` bugzilla-daemon [this message]
     [not found] <bug-174-13@https.bugs.libre-soc.org/>
2020-04-15 12:14 ` bugzilla-daemon

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