From: bugzilla-daemon@libre-riscv.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 264] ISA switch needs to be a privileged operation
Date: Mon, 23 Mar 2020 08:37:44 +0000
Message-ID: <bug-264-13-nCVZIGEEEs@http.bugs.libre-riscv.org/> (raw)
In-Reply-To: <bug-264-13@http.bugs.libre-riscv.org/>
http://bugs.libre-riscv.org/show_bug.cgi?id=264
--- Comment #6 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
(In reply to Jacob Lifshay from comment #5)
> If we use the same 2 C opcodes for compressed pairs, then we can end up with
> 13.5 bits available per instruction, rather than just 11, which allows us to
> define about 5.656 (!) times as many compressed instructions.
>
> 13.5 = (32 - 6 + 1) / 2
> 11 = 16 - 6 + 1
> 5.656... = 2 ^ (13.5 - 11)
other ideas along this theme include saying, in that initial 32-bit space, is
to specify how many of the next instructions are to be encoded as C.
i'd recommend to reserve the option to do this, as it involves storing state
(the countdown timer) whereas just having 2 C opcodes as pairs is dead simple,
as long as you accept that the PC encodes the state information about the fact
that if the PC is on a 2-byte boundary you're in the middle of the pair.
this allows the PC to store the state if there is a trap.
> VLE requiring separate pages seems like a total mess that we should not
> emulate.
i only looked at it briefly so we can't write it off entirely, however... yeah
:)
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Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-22 23:19 [libre-riscv-dev] [Bug 264] New: " bugzilla-daemon
2020-03-23 0:01 ` [libre-riscv-dev] [Bug 264] " bugzilla-daemon
2020-03-23 0:26 ` bugzilla-daemon
2020-03-23 1:12 ` bugzilla-daemon
2020-03-23 7:54 ` bugzilla-daemon
2020-03-23 8:30 ` bugzilla-daemon
2020-03-23 8:37 ` bugzilla-daemon [this message]
2020-03-23 8:47 ` bugzilla-daemon
2020-03-23 8:54 ` bugzilla-daemon
2020-03-23 8:57 ` bugzilla-daemon
2020-03-23 10:24 ` bugzilla-daemon
2020-03-23 10:28 ` bugzilla-daemon
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