From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 352] New: virtual (dependency-tracked) regfile needed
Date: Mon, 25 May 2020 14:23:26 +0000
Message-ID: <bug-352-13@https.bugs.libre-soc.org/> (raw)
https://bugs.libre-soc.org/show_bug.cgi?id=352
Bug ID: 352
Summary: virtual (dependency-tracked) regfile needed
Product: Libre-SOC's first SoC
Version: unspecified
Hardware: PC
OS: Mac OS
Status: CONFIRMED
Severity: enhancement
Priority: ---
Component: Source Code
Assignee: lkcl@lkcl.net
Reporter: lkcl@lkcl.net
CC: libre-riscv-dev@lists.libre-riscv.org
NLnet milestone: ---
i was hoping this would not be needed at this stage, however it looks like it
is.
there are over 100 active SPRs in POWER9. we cannot possibly have
a Dependency Matrix 100-wide for that.
therefore, option 1:
* restrict the supported SPRs to a manageable subset (and remap them)
option 2:
* have a "virtual" (dependency-tracked) front-end on the Regfile.
traditional names for this are "PRF-ARF" - physical regfile / architectural
regfile.
normally, the numbering for regfiles would have fixed indexes. here, instead,
we need *dynamically-allocated* re-mapped indexing, plus a tracking system
which will be based on a pair of "bitvectors", generated and managed by the
FU-REGs Dependency Matrix: global_read_pending and global_write_pending
on first allocation, any free bit in g_r and g_w (both must be free) is used
to indicate that that "slot" is available. the association between the
"real" regfile (binary? unary?) index will be recorded and kept.
the association will only be dropped when both the g_r and g_w pending
bitvectors clear their bits corresponding to that PRF-ARF association.
if there are no free bits, the entire execution engine - further allocation
of instructions to Function Units - is REQUIRED to stall.
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