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From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 371] code removed by commit 12297566322355ce5fed2e2a5460bea54f69e79e
Date: Tue, 09 Jun 2020 12:49:10 +0000
Message-ID: <bug-371-13-oebqsxiWV9@https.bugs.libre-soc.org/> (raw)
In-Reply-To: <bug-371-13@https.bugs.libre-soc.org/>

https://bugs.libre-soc.org/show_bug.cgi?id=371

Luke Kenneth Casson Leighton <lkcl@lkcl.net> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Assignee|lkcl@lkcl.net               |libre-soc@platen-software.d
                   |                            |e

--- Comment #1 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
commit 12297566322355ce5fed2e2a5460bea54f69e79e
Author: Tobias Platen <tplaten@posteo.de>
Date:   Tue Jun 9 14:00:50 2020 +0200

    fixes for DualPortSplitter

@@ -307,19 +308,11 @@ class L0CacheBuffer(Elaboratable):
     def __init__(self, n_units, mem, regwid=64, addrwid=48):
         self.n_units = n_units
         self.mem = mem
-        self.regwid = regwid
-        self.addrwid = addrwid
         ul = []
         for i in range(n_units):
             ul.append(LDSTPort(i, regwid, addrwid))
         self.dports = Array(ul)

-    def truncaddr(self, addr):
-        """truncates the address to the top bits of the memory granularity
-        """
-        nbits = log2_int(self.mem.regwid)
-        return addr[nbits:]
-
     def elaborate(self, plat

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Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-09 12:48 [libre-riscv-dev] [Bug 371] New: " bugzilla-daemon
2020-06-09 12:49 ` bugzilla-daemon [this message]
2020-06-09 13:06 ` [libre-riscv-dev] [Bug 371] " bugzilla-daemon
2020-06-09 13:07 ` bugzilla-daemon
2020-06-09 13:08 ` bugzilla-daemon
2020-06-09 13:17 ` bugzilla-daemon
2020-06-10 14:22 ` bugzilla-daemon
2020-06-10 14:34 ` bugzilla-daemon
2020-06-10 14:39 ` bugzilla-daemon
2020-06-10 14:40 ` bugzilla-daemon

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