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From: Yehowshua <yimmanuel3@gatech.edu>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] 4 Simulators?
Date: Thu, 7 May 2020 14:41:49 -0400
Message-ID: <1CEFB975-A644-477E-967B-50C6B0312228@gatech.edu> (raw)
In-Reply-To: <CAC2bXD7J=z5kbEBOtsmbh==awW6mBeKuFmsGJDOW6fr6y=sA6Q@mail.gmail.com>


> 
> I'm not working on any simulators (except for the experimental
> spectre-proof cpu design which is currently on-hold).
> 
> Jacob Lifshay

Oh - you said LD/ST here.

http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-May/006327.html

Yehowshua


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Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-07 17:33 Yehowshua
2020-05-07 17:38 ` Michael Nolan
2020-05-07 18:23 ` Luke Kenneth Casson Leighton
2020-05-07 18:30   ` Yehowshua
2020-05-07 18:40     ` Jacob Lifshay
2020-05-07 18:41       ` Yehowshua [this message]
2020-05-07 18:46         ` Jacob Lifshay
2020-05-07 18:53     ` Luke Kenneth Casson Leighton
2020-05-07 18:54     ` Tobias Platen
2020-05-07 19:02       ` Luke Kenneth Casson Leighton

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