From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] 4 Simulators?
Date: Thu, 7 May 2020 20:02:30 +0100
Message-ID: <CAPweEDyu-P1ucg8X2bcGix5obOrWtMHH7tbvJx7nFDKeGcDOCQ@mail.gmail.com> (raw)
In-Reply-To: <20200507205411.809af7c024d65954ce093d1b@platen-software.de>
On Thu, May 7, 2020 at 7:54 PM Tobias Platen
<libre-soc@platen-software.de> wrote:
> Yes I was working on the Python Simulator,
the discussions in the bugtracker center around the auto-generated
one. i appreciate that there is a lot going on.
> and I was also looking into the sourcecode of the Dolphin emulator.
https://github.com/dolphin-emu/dolphin/blob/master/Source/Core/Core/PowerPC/Interpreter/Interpreter_Integer.cpp
interesting. this code *might* be a better starting point for SV
augmentation than pearpc, because c++ provides the means to do
operator-overloads (and templates).
btw do not waste time looking at the JIT version. we absolutely do
not need a JIT interpreted emulator. we need a *cycle accurate*
emulator.
l.
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Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-07 17:33 Yehowshua
2020-05-07 17:38 ` Michael Nolan
2020-05-07 18:23 ` Luke Kenneth Casson Leighton
2020-05-07 18:30 ` Yehowshua
2020-05-07 18:40 ` Jacob Lifshay
2020-05-07 18:41 ` Yehowshua
2020-05-07 18:46 ` Jacob Lifshay
2020-05-07 18:53 ` Luke Kenneth Casson Leighton
2020-05-07 18:54 ` Tobias Platen
2020-05-07 19:02 ` Luke Kenneth Casson Leighton [this message]
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