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From: "Immanuel, Yehowshua U" <yimmanuel3@gatech.edu>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: [libre-riscv-dev] Following the PowerISA
Date: Mon, 6 Apr 2020 02:46:28 +0000
Message-ID: <68333793-489F-4F74-88C2-7DA0BCA206A6@gatech.edu> (raw)

On the website, we have:

> The Libre RISC-V Project is building a hybrid CPU/GPU SoC. As the name of the project implies, 
> we will be following the RISC-V ISA due to it being open-source and also because of the huge 
> software and hardware ecosystem building around it. 

Since we are now doing userspace RISCV+POWER and system-wide POWER, I imagine this section should be updated?
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Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-06  2:46 Immanuel, Yehowshua U [this message]
2020-04-06  2:51 ` Immanuel, Yehowshua U
2020-04-06  3:40   ` Immanuel, Yehowshua U
2020-04-06  6:28     ` Immanuel, Yehowshua U
2020-04-06  7:02       ` Jacob Lifshay
2020-04-06 10:58   ` Luke Kenneth Casson Leighton
2020-04-06 10:51 ` Luke Kenneth Casson Leighton

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