[libre-riscv-dev] mortbopet/Ripes: A graphical processor simulator and assembly editor for the RISC-V ISA

[libre-riscv-dev] mortbopet/Ripes: A graphical processor simulator and assembly editor for the RISC-V ISA

[Cole Poirier]

Hi Libre-SOC developers,

I came across this graphical processor simulator for the RISC-V ISA:
https://github.com/mortbopet/Ripes. Is this possibly valuable to us?
Would it be possible for us to use this as a foundation or is it too
specific to RISC-V?

Cole

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Re: [libre-riscv-dev] mortbopet/Ripes: A graphical processor simulator and assembly editor for the RISC-V ISA

[Luke Kenneth Casson Leighton]

---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68

On Tue, Jun 9, 2020 at 8:25 PM Cole Poirier <colepoirier@gmail.com> wrote:
>
> Hi Libre-SOC developers,
>
> I came across this graphical processor simulator for the RISC-V ISA:
> https://github.com/mortbopet/Ripes. Is this possibly valuable to us?
> Would it be possible for us to use this as a foundation

maybe.

> or is it too specific to RISC-V?

there's a subdirectory "processors" which tends to suggest it may have
been planned to have more than one.

l

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