* [libre-riscv-dev] POWER Spec parser nearly done
@ 2020-04-05 13:10 Luke Kenneth Casson Leighton
0 siblings, 0 replies; only message in thread
From: Luke Kenneth Casson Leighton @ 2020-04-05 13:10 UTC (permalink / raw)
To: Libre-RISCV General Development
for a given value of "done" :)
i have a switch case grammar to write, to support sprset, and the integer
opcodes as far as parsing is concerned is done.
that will just leave actually *using* the resultant code, which involves
identifying missing variables, functions, SPRs and so on and ensuring they
go correctly in and out of the various opcode functions.
hardware-wise i have had a chance to go over the full instruction set, and
there's very little chance of doing full automated conversion.
partial, yes (saving time) however full conversion, no, the pseudocode is
too "linear" where hardware is parallel.
l.
--
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
_______________________________________________
libre-riscv-dev mailing list
libre-riscv-dev@lists.libre-riscv.org
http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev
^ permalink raw reply [flat|nested] only message in thread
only message in thread, back to index
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-04-05 13:10 [libre-riscv-dev] POWER Spec parser nearly done Luke Kenneth Casson Leighton
Libre RISC-V Mailing list Archives (accessible via public-inbox)
Archives are clonable: git clone --mirror https://inbox.libre-soc.org/libre-riscv-dev
Example config snippet for mirrors
AGPL code for this site: git clone https://public-inbox.org/public-inbox.git