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From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] GPU Drivers ROCM
Date: Sat, 6 Jun 2020 03:10:44 +0100
Message-ID: <CAPweEDwsur1zY=_cXsukiE0MV6Jz+O2ovqWuaCkF9pUbfNQQTg@mail.gmail.com> (raw)
In-Reply-To: <776743AB-327C-43E6-B24A-2BE1FC2AE3E2@gatech.edu>

On Saturday, June 6, 2020, Yehowshua <yimmanuel3@gatech.edu> wrote:

> It recently occurred to me that the entire ROCM stack is open.
> ROCM also has, OpenGL, Vulkan, OpenCL, and CUDA -> HIP
> frontends.


 https://github.com/RadeonOpenCompute/ROCm


> At the very bottom of ROCM sits llvm which emits AMD GPU opcodes.


according to the diagram, NVIDIA CUDA GPU opcodes as well


>
> It **should be possible to modify this emitter for our GPU. Then we’d
> virtually
> have to do little to no work.


indeed.

another possibility is to actively support AMDGPU opcodes.

this is the aporoach taken by MIAOW (a subset of).


> I’m actively investigating if this is possible and am trying to start a
> conversation
> with some ROCM engineers.


remember to emphasise to them that we are doing a hybrid CPUGPU.  that the
usual route of a full IPC / RPC mechanism communicating to a foreign remote
architecture is gone, and any complex IPC/RPC inter-kernel bridge code is
entirely gone, replaced with *direct* executed assembly code.

otherwise they will think that the conversation involves us being a
Vivante, or a MALI, and consequently they will think that you are talking
about 10, 20 or greater man-years of work, whereas what you are actually
talking about is of the order of around 1 maybe 2.

l.




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Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-06  1:29 Yehowshua
2020-06-06  2:10 ` Luke Kenneth Casson Leighton [this message]

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