[libre-riscv-dev] daily kan-ban update 10jun2020

[libre-riscv-dev] daily kan-ban update 10jun2020

[Luke Kenneth Casson Leighton]

yesterday:

* started on L0CacheBuffer and LenExpander, need to offset / shift /
mask LD/ST data
* added means to get CR/XER etc to test_sim.py (qemu-simulator comparator)

today:

* started code-morph of */test_pipe_caller.py and test_*_compunit.py
to get them to use common code.  ultimately to be able to separate sim
and HDL to behind a common API (then add qemu and native execution as
well)

later:

* more on L0CacheBuffer.

l.

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Re: [libre-riscv-dev] daily kan-ban update 10jun2020

[Tobias Platen]

morning: nothing
now: working on LDSTSplitter

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Re: [libre-riscv-dev] daily kan-ban update 10jun2020

[Cole Poirier]

Yesterday: Only emails and commenting on bug reports

Today: Work on TRAP pipeline unit tests

Cole

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Re: [libre-riscv-dev] daily kan-ban update 10jun2020

[Luke Kenneth Casson Leighton]

On Wednesday, June 10, 2020, Tobias Platen <libre-soc@platen-software.de>
wrote:

> morning: nothing
> now: working on LDSTSplitter


tobias: my recommendation is, look at adding the 2nd argument to LenExpand
(cover=8) in LDSTSplitter, and multiply the bitwidth of the data in/out by 8

you can use LenExpand.rexp_o as a byte mask where appropriate.

basically the idea is to turn LDSTSplitter from its embarrassing splitting
of *bits* of data into dealing with *bytes* of data.

the actual FSM is perfectly functional.

l.




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Re: [libre-riscv-dev] daily kan-ban update 10jun2020

[Jacob Lifshay]

yesterday:
created setup stage of div pipeline
today:
working on div pipeline

Jacob
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