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From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] daily kan-ban update 31jul2020
Date: Fri, 31 Jul 2020 18:41:27 +0100
Message-ID: <CAPweEDxfMaXaa58YuFNRj8-_Js0vfAreF85RYqy=LZ811SZusg@mail.gmail.com> (raw)
In-Reply-To: <CAPweEDyjb7M+8zFsHBabTbEFY9iU7Rth8wfA5cQh3H55k0RO2A@mail.gmail.com>

On Friday, July 31, 2020, Luke Kenneth Casson Leighton <lkcl@lkcl.net>
wrote:

not sure.  the litex simulation is "acting up", not outputting serial
> console data (for microwatt or libresoc), is stopping early and not quite
> matching.
>

ok i have some clues from this.  memory LD / STs were at the wrong
addresses.  this led me to investigate the immediate offsets, which turned
out to be unsigned only.

immediates are calculated in power_decoder which was one the first things
written. it is amazing that it has gone unnoticed for so long.

basically we had nowhere near good enough unit test coverage for LD / ST
otherwise this would have been caught far sooner.

l.



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Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-31 13:53 Luke Kenneth Casson Leighton
2020-07-31 17:41 ` Luke Kenneth Casson Leighton [this message]

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