Re: [libre-riscv-dev] go die/cancel signals in fsm

From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] go die/cancel signals in fsm
Date: Wed, 22 Jul 2020 13:27:39 +0100
Message-ID: <CAPweEDycObMeHwVR60ErPt7tyw0bO5+d3CXbsz3EOTQVYYd85w@mail.gmail.com> (raw)
In-Reply-To: <CAPweEDwpQY8oH33GjV=P=zmXP5uCKUMK3HnEoFEA1snfg32Mtw@mail.gmail.com>

On Wed, Jul 22, 2020 at 10:51 AM Luke Kenneth Casson Leighton
<lkcl@lkcl.net> wrote:

> > This is
> > needed to not have to wait 63(!) more clock cycles for a canceled div
> > instruction to finish computing before another div instruction can be
> > started.
>
> indeed.

for now, you can see that issuer.py is a FSM:
https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/simple/issuer.py;hb=HEAD#l124

so there's not going to be any cancellation.  instructions are done
one at a time, total freeze until the instruction is completed.

l.

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