From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] daily kan-ban update 16jul2020
Date: Fri, 17 Jul 2020 18:13:42 +0100
Message-ID: <CAPweEDz86pfLEkuentsYmUykP4C4R+e9X+9v0hEEOZJOBoUAmA@mail.gmail.com> (raw)
In-Reply-To: <CAC2bXD5wD0CYN_6TxWUQVRuTrr7uwq3FKJtJ_gCgEpXFkDC58A@mail.gmail.com>
On Fri, Jul 17, 2020 at 5:32 AM Jacob Lifshay <programmerjake@gmail.com> wrote:
> added code to switch out div pipeline's udivrem core to different
> implementations -- added an implementation that uses nmigen's div and
> rem operators for testing rest of div pipeline -- will add a FSM-based
> implementation soon
btw jacob i've been re-reading alu_hier.py - both of those classes -
ALU and DummyALU - *are* FSM-based (and obey the pipeline API).
i've taken a tag/snapshot of the pipeline work (div_pipeline) prior to
replacement, so we can always refer back to it. i'm strongly leaning
towards ripping out the entire lot. because of the abstraction of
using the ieee754fp code it's really hard to follow. even with 6 to 8
editor windows open i'm having a hard time keeping up with it.
so feel free to rip out the whole lot ok?
l.
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Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-17 4:32 Jacob Lifshay
2020-07-17 6:38 ` Luke Kenneth Casson Leighton
2020-07-17 17:13 ` Luke Kenneth Casson Leighton [this message]
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