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From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: [libre-riscv-dev] daily kan-ban update 31may2020
Date: Sun, 31 May 2020 14:38:56 +0100
Message-ID: <CAPweEDznJw-y=VJE=q0RbDcJ5LPGJ6wpv7ADq4Ek2hfAnXPUTA@mail.gmail.com> (raw)

yesterday:

* went through inter-relationship between MultiCompUnit and ALU,
getting MCU to conform to the pipeline API.  it's a mess, however it's
functional.
* started debugging ALU Function Unit through MultiCompUnit (closest
thing to actually connecting them to a regfile)
* added "read register mask" and "write register mask" capability to
MultiCompUnit

today:

* finding numerous errors where register-writes are being requested by
the ALU pipeline, where the data is *not* valid ("ok" signal set when
it should not be)

l.

---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68

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Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-31 13:38 Luke Kenneth Casson Leighton [this message]
2020-05-31 15:13 ` Luke Kenneth Casson Leighton
2020-05-31 20:12 ` Tobias Platen
2020-05-31 22:14   ` Luke Kenneth Casson Leighton

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