* [libre-riscv-dev] daily kan-ban update 08jun2020
@ 2020-06-08 20:08 Luke Kenneth Casson Leighton
2020-06-08 21:17 ` Cole Poirier
0 siblings, 1 reply; 4+ messages in thread
From: Luke Kenneth Casson Leighton @ 2020-06-08 20:08 UTC (permalink / raw)
To: Libre-RISCV General Development
yesterday:
* worked with Cole on TRAP
* fixed the Condition Register MFCR bug
* started on XER testing
* reviewed the IoT pitch
today:
* dealt with yet another massive headache.
* fixed XER SO/OV/OV32 handling (simulator and test_core)
going to take it easy for the rest of the day, return to LDST CompUnit
testing tomorrow.
l.
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
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* Re: [libre-riscv-dev] daily kan-ban update 08jun2020
2020-06-08 20:08 [libre-riscv-dev] daily kan-ban update 08jun2020 Luke Kenneth Casson Leighton
@ 2020-06-08 21:17 ` Cole Poirier
2020-06-08 22:13 ` Luke Kenneth Casson Leighton
0 siblings, 1 reply; 4+ messages in thread
From: Cole Poirier @ 2020-06-08 21:17 UTC (permalink / raw)
To: Libre-RISCV General Development; +Cc: Libre-RISCV General Development
On Jun 8 2020, at 1:08 pm, Luke Kenneth Casson Leighton <lkcl@lkcl.net> wrote:
> yesterday:
>
> * worked with Cole on TRAP
> * fixed the Condition Register MFCR bug
> * started on XER testing
> * reviewed the IoT pitch
Thank you so much for this Luke, the discussion you had on-list with our
less frequently commenting members (because they have full time jobs),
who are incredibly technically capable was phenomenally helpful.
> today:
>
> * dealt with yet another massive headache.
> * fixed XER SO/OV/OV32 handling (simulator and test_core)
>
> going to take it easy for the rest of the day, return to LDST CompUnit
> testing tomorrow.
>
> l.
I'm very sorry to hear you're suffering from massive headaches, several
of my family members suffer from migraines, I know it's very unpleasant.
Today I think I need to focus exclusively on the pitch because the
deadline is so close and there is currently so much missing info.
I'm planning on taking the discussion on list, and the comments on the
pitch on the wiki and coming up with a new pitch specific to these
discussions.
I'm going to spend the next two hours trying to take all of the
technical aspects of the pitch and put them into a coherent form with my
understanding of the technical aspects. Then I'll send this to the list
so that you and others can reply and correct inline.
I'll try to put just a few very specific questions (such as the
advantages/high level summary of Simple-V) for you and other technical
project members to answer. I would try answer this myself given your
present state, but unfortunately I don't think I can understand and
explain something like Simple-V on my own in a day.
Can I ask you to see if you're able to answer some of these questions
today, if your illness permits? I hate to ask you while you're sick, but
I think the pitch will really suffer without your technical input...
Thank you,
Cole
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* Re: [libre-riscv-dev] daily kan-ban update 08jun2020
2020-06-08 21:17 ` Cole Poirier
@ 2020-06-08 22:13 ` Luke Kenneth Casson Leighton
2020-06-08 22:29 ` Cole Poirier
0 siblings, 1 reply; 4+ messages in thread
From: Luke Kenneth Casson Leighton @ 2020-06-08 22:13 UTC (permalink / raw)
To: Libre-RISCV General Development
On Mon, Jun 8, 2020 at 10:17 PM Cole Poirier <colepoirier@gmail.com> wrote:
> I'll try to put just a few very specific questions (such as the
> advantages/high level summary of Simple-V) for you and other technical
> project members to answer. I would try answer this myself given your
> present state, but unfortunately I don't think I can understand and
> explain something like Simple-V on my own in a day.
yyeah. last time i explained it to someone (in detail) it was to
Alain. it took six hours.
the summary: rather than have dozens of instructions ADD x1, x10 ADD
x2, x11 ADD x3, x12, instead you deploy SimpleV - with *one*
instruction - telling it (by setting VL) exactly how many registers,
in sequence, you would like that *ONE* instruction to push into the
instruction queue.
that's basically all there is to it. it should be pretty obvious
therefore that it is effectively a very simple version of an
instruction "compression algorithm".
in effect, Simple-V is a hardware-level for-loop. if you have heard
of Zero-Overhead Loops, it is a bit like that. except, whilst ZOHLs
loop around a *group* of instructions, Simple-V gives the option to
apply the for-loop to *ANY* instruction, and does so *on* that
instruction *before* moving on to the next one.
it's like a Sub- Program Counter, in effect.
> Can I ask you to see if you're able to answer some of these questions
> today, if your illness permits?
it's fine, now: i took... i won't go into the medical details, there's
a procedure i follow which clears out toxins and it was effective.
also, a drink made from large quantities of ginger root, cardamons,
black pepper and chilis, caused me to cough and splutter and generally
hawk and spit profusely (as might be expected), and surpriise! i'm
feeling much better.
l.
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [libre-riscv-dev] daily kan-ban update 08jun2020
2020-06-08 22:13 ` Luke Kenneth Casson Leighton
@ 2020-06-08 22:29 ` Cole Poirier
0 siblings, 0 replies; 4+ messages in thread
From: Cole Poirier @ 2020-06-08 22:29 UTC (permalink / raw)
To: Libre-RISCV General Development
> On Jun 8, 2020, at 3:13 PM, Luke Kenneth Casson Leighton <lkcl@lkcl.net> wrote:
> yyeah. last time i explained it to someone (in detail) it was to
> Alain. it took six hours.
>
> the summary: rather than have dozens of instructions ADD x1, x10 ADD
> x2, x11 ADD x3, x12, instead you deploy SimpleV - with *one*
> instruction - telling it (by setting VL) exactly how many registers,
> in sequence, you would like that *ONE* instruction to push into the
> instruction queue.
>
> that's basically all there is to it. it should be pretty obvious
> therefore that it is effectively a very simple version of an
> instruction "compression algorithm".
>
> in effect, Simple-V is a hardware-level for-loop. if you have heard
> of Zero-Overhead Loops, it is a bit like that. except, whilst ZOHLs
> loop around a *group* of instructions, Simple-V gives the option to
> apply the for-loop to *ANY* instruction, and does so *on* that
> instruction *before* moving on to the next one.
>
> it's like a Sub- Program Counter, in effect
Aha that makes sense! I’ll integrate this into the rest of the insights from the list earlier today.
>
>> Can I ask you to see if you're able to answer some of these questions
>> today, if your illness permits?
>
> it's fine, now: i took... i won't go into the medical details, there's
> a procedure i follow which clears out toxins and it was effective.
> also, a drink made from large quantities of ginger root, cardamons,
> black pepper and chilis, caused me to cough and splutter and generally
> hawk and spit profusely (as might be expected), and surpriise! i'm
> feeling much better.
>
> l.
I’m glad to hear you’re feeling better! However you’ve figured out how to make it happen. Thanks Luke, I’ll hopefully have something for you in about an hour.
Cole
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2020-06-08 20:08 [libre-riscv-dev] daily kan-ban update 08jun2020 Luke Kenneth Casson Leighton
2020-06-08 21:17 ` Cole Poirier
2020-06-08 22:13 ` Luke Kenneth Casson Leighton
2020-06-08 22:29 ` Cole Poirier
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