From: bugzilla-daemon@libre-riscv.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 272] functions needed in POWER simulator which match 3.0B spec
Date: Tue, 31 Mar 2020 23:07:07 +0000
Message-ID: <bug-272-13-E5Y4srMfFn@http.bugs.libre-riscv.org/> (raw)
In-Reply-To: <bug-272-13@http.bugs.libre-riscv.org/>
http://bugs.libre-riscv.org/show_bug.cgi?id=272
--- Comment #11 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
(In reply to Michael Nolan from comment #10)
> Doing it through signal would mean messing with yield and such wouldn't it?
> Unless implementing the class turns out to be very difficult, I'd kinda like
> to avoid that
sigh well as the PowerDecoder class is based around Signal we are kinda stuck
with yield and it is a pain.
i will attempt a pre and post process tomorrow which basically duplicates what
you did to get src1 2 etc out of the opcode.
once i have the regnums as integers i believe the class Int as defined, which
passes Int(value,len) around between ooerations rather than just value would do
the trick
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Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-30 17:27 [libre-riscv-dev] [Bug 272] New: " bugzilla-daemon
2020-03-30 19:04 ` [libre-riscv-dev] [Bug 272] " bugzilla-daemon
2020-03-30 19:24 ` bugzilla-daemon
2020-03-31 12:57 ` bugzilla-daemon
2020-03-31 13:06 ` bugzilla-daemon
2020-03-31 14:24 ` bugzilla-daemon
2020-03-31 14:31 ` bugzilla-daemon
2020-03-31 18:35 ` bugzilla-daemon
2020-03-31 18:47 ` bugzilla-daemon
2020-03-31 20:06 ` bugzilla-daemon
2020-03-31 22:02 ` bugzilla-daemon
2020-03-31 23:07 ` bugzilla-daemon [this message]
2020-04-01 15:35 ` bugzilla-daemon
2020-04-01 18:40 ` bugzilla-daemon
2020-04-01 19:06 ` bugzilla-daemon
2020-04-01 21:55 ` bugzilla-daemon
2020-04-01 23:05 ` bugzilla-daemon
2020-04-01 23:44 ` bugzilla-daemon
2020-04-02 10:41 ` bugzilla-daemon
2020-04-05 18:37 ` bugzilla-daemon
[not found] <bug-272-13@https.bugs.libre-soc.org/>
2020-04-27 20:25 ` bugzilla-daemon
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