[libre-riscv-dev] [Bug 286] DataPointer concept: long-immediate references

[bugzilla-daemon@libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=286

Jacob Lifshay <programmerjake@gmail.com> changed:

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                 CC|                            |programmerjake@gmail.com

--- Comment #5 from Jacob Lifshay <programmerjake@gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #4)
>   particularly as a reduction in i-cache
> size obeys a square law reduction in power consumption.

I would expect the cache power usage to be linearly proportional to it's size
in bits once it's big enough to split into many smaller sram chunks, since each
sram chunk would use about the same power and you'd only need a linear number
of them. I have not been able to find any useful references for that though.

>  therefore if we can
> get it down 5% that's a 10.25% reduction in power (!)

yes -- except that cache sizes are almost always a power of 2 in size (or
rarely 3 * 2^n), so the only effect is probably to reduce the access rate.

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