* [libre-riscv-dev] [Bug 303] New: define peripheral set for 180nm ASIC
@ 2020-05-07 12:44 bugzilla-daemon
2020-05-12 12:11 ` [libre-riscv-dev] [Bug 303] " bugzilla-daemon
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: bugzilla-daemon @ 2020-05-07 12:44 UTC (permalink / raw)
To: libre-riscv-dev
https://bugs.libre-soc.org/show_bug.cgi?id=303
Bug ID: 303
Summary: define peripheral set for 180nm ASIC
Product: Libre-SOC's first SoC
Version: unspecified
Hardware: PC
OS: Linux
Status: CONFIRMED
Severity: enhancement
Priority: ---
Component: Source Code
Assignee: lkcl@lkcl.net
Reporter: lkcl@lkcl.net
CC: libre-riscv-dev@lists.libre-riscv.org
NLnet milestone: ---
we need to define a peripheral set for the ASIC, create a page
(and use the peripheral / pinmux generator to describe it)
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^ permalink raw reply [flat|nested] 4+ messages in thread* [libre-riscv-dev] [Bug 303] define peripheral set for 180nm ASIC 2020-05-07 12:44 [libre-riscv-dev] [Bug 303] New: define peripheral set for 180nm ASIC bugzilla-daemon @ 2020-05-12 12:11 ` " bugzilla-daemon 2020-05-12 12:11 ` bugzilla-daemon 2020-05-12 12:12 ` bugzilla-daemon 2 siblings, 0 replies; 4+ messages in thread From: bugzilla-daemon @ 2020-05-12 12:11 UTC (permalink / raw) To: libre-riscv-dev https://bugs.libre-soc.org/show_bug.cgi?id=303 --- Comment #1 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> --- yehowshua i added a stub/starting-point ls180 https://git.libre-soc.org/?p=pinmux.git;a=blob;f=src/spec/ls180.py;h=77c5f1f7f7923cb8292499bac189ff1ce8f3b6ff;hb=aca6d68a6159136fe1f36c6430e2ffd07da13e8c also added a stub / dummy LPC function: https://git.libre-soc.org/?p=pinmux.git;a=blob;f=src/spec/pinfunctions.py;h=e46be8d114f00bbf571092c4e7a9ec5ece39d04b;hb=aca6d68a6159136fe1f36c6430e2ffd07da13e8c#l52 it will need its pin naming correcting, and also in ls180.py everything including LPC moving to a single column. we need to move quickly on this because Rudi is waiting for us to communicate back to him the required peripheral set, and he is experienced enough to know that we are well beyond the industry standard time for making these decisions. -- You are receiving this mail because: You are on the CC list for the bug. _______________________________________________ libre-riscv-dev mailing list libre-riscv-dev@lists.libre-riscv.org http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev ^ permalink raw reply [flat|nested] 4+ messages in thread
* [libre-riscv-dev] [Bug 303] define peripheral set for 180nm ASIC 2020-05-07 12:44 [libre-riscv-dev] [Bug 303] New: define peripheral set for 180nm ASIC bugzilla-daemon 2020-05-12 12:11 ` [libre-riscv-dev] [Bug 303] " bugzilla-daemon @ 2020-05-12 12:11 ` bugzilla-daemon 2020-05-12 12:12 ` bugzilla-daemon 2 siblings, 0 replies; 4+ messages in thread From: bugzilla-daemon @ 2020-05-12 12:11 UTC (permalink / raw) To: libre-riscv-dev https://bugs.libre-soc.org/show_bug.cgi?id=303 Luke Kenneth Casson Leighton <lkcl@lkcl.net> changed: What |Removed |Added ---------------------------------------------------------------------------- Assignee|lkcl@lkcl.net |yimmanuel3@gatech.edu -- You are receiving this mail because: You are on the CC list for the bug. _______________________________________________ libre-riscv-dev mailing list libre-riscv-dev@lists.libre-riscv.org http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev ^ permalink raw reply [flat|nested] 4+ messages in thread
* [libre-riscv-dev] [Bug 303] define peripheral set for 180nm ASIC 2020-05-07 12:44 [libre-riscv-dev] [Bug 303] New: define peripheral set for 180nm ASIC bugzilla-daemon 2020-05-12 12:11 ` [libre-riscv-dev] [Bug 303] " bugzilla-daemon 2020-05-12 12:11 ` bugzilla-daemon @ 2020-05-12 12:12 ` bugzilla-daemon 2 siblings, 0 replies; 4+ messages in thread From: bugzilla-daemon @ 2020-05-12 12:12 UTC (permalink / raw) To: libre-riscv-dev https://bugs.libre-soc.org/show_bug.cgi?id=303 Luke Kenneth Casson Leighton <lkcl@lkcl.net> changed: What |Removed |Added ---------------------------------------------------------------------------- Status|CONFIRMED |RESOLVED Resolution|--- |DUPLICATE --- Comment #2 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> --- whoops how did we end up creating 2 bugreports, #304 and #303? *** This bug has been marked as a duplicate of bug 304 *** -- You are receiving this mail because: You are on the CC list for the bug. _______________________________________________ libre-riscv-dev mailing list libre-riscv-dev@lists.libre-riscv.org http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, back to index Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-05-07 12:44 [libre-riscv-dev] [Bug 303] New: define peripheral set for 180nm ASIC bugzilla-daemon 2020-05-12 12:11 ` [libre-riscv-dev] [Bug 303] " bugzilla-daemon 2020-05-12 12:11 ` bugzilla-daemon 2020-05-12 12:12 ` bugzilla-daemon
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