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From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 304] Define minimum viable interface set for 180nm ASIC
Date: Fri, 08 May 2020 14:37:52 +0000
Message-ID: <bug-304-13-xAermu8zlP@https.bugs.libre-soc.org/> (raw)
In-Reply-To: <bug-304-13@https.bugs.libre-soc.org/>

https://bugs.libre-soc.org/show_bug.cgi?id=304

Yehowshua <yimmanuel3@gatech.edu> changed:

           What    |Removed                     |Added
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                URL|http://lists.libre-riscv.or |
                   |g/pipermail/libre-riscv-dev |
                   |/2020-May/006374.html       |

--- Comment #2 from Yehowshua <yimmanuel3@gatech.edu> ---
Relevant Links:

http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-May/006374.html
http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-May/006372.html
https://libre-soc.org/shakti/m_class/pinouts/
https://gitlab.raptorengineering.com/raptor-engineering-public/lpc-spi-bridge-fpga/tree/master

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  parent reply index

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-08 11:15 [libre-riscv-dev] [Bug 304] New: " bugzilla-daemon
2020-05-08 14:36 ` [libre-riscv-dev] [Bug 304] " bugzilla-daemon
2020-05-08 14:37 ` bugzilla-daemon [this message]
2020-05-12 12:12 ` bugzilla-daemon
2020-05-12 12:13 ` bugzilla-daemon
2020-05-12 12:14 ` bugzilla-daemon
2020-05-20 22:14 ` bugzilla-daemon

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