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From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 339] create POWER9 ROTATE (SHIFTROT) pipeline
Date: Sun, 07 Jun 2020 14:32:31 +0000
Message-ID: <bug-339-13-0RuknsRBn8@https.bugs.libre-soc.org/> (raw)
In-Reply-To: <bug-339-13@https.bugs.libre-soc.org/>

https://bugs.libre-soc.org/show_bug.cgi?id=339

--- Comment #8 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #7)
> sradi is different
> 
> carry <- s & ((r& ¬m) != 0) CA <- carry CA32 <- carry
> 
> best add CA and CA32 to the fields that can be returned.

sorted.  it's a bit of a mess, had to special-case it, but it's
functional.

also noted that rotator.vhdl has changed (support for OP_EXTSWSLI
which i may add next)

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  parent reply index

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-22 17:27 [libre-riscv-dev] [Bug 339] New: create POWER9 ROTATE pipeline bugzilla-daemon
2020-05-22 17:27 ` [libre-riscv-dev] [Bug 339] " bugzilla-daemon
2020-05-22 17:41 ` bugzilla-daemon
2020-05-22 19:07 ` bugzilla-daemon
2020-06-01 12:40 ` [libre-riscv-dev] [Bug 339] create POWER9 ROTATE (SHIFTROT) pipeline bugzilla-daemon
2020-06-01 18:09 ` bugzilla-daemon
2020-06-01 19:31 ` bugzilla-daemon
2020-06-01 20:13 ` bugzilla-daemon
2020-06-01 20:17 ` bugzilla-daemon
2020-06-07 14:32 ` bugzilla-daemon [this message]
2020-06-08 18:37 ` bugzilla-daemon

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