* [libre-riscv-dev] [Bug 345] New: define POWER9 regfiles
@ 2020-05-24 14:55 bugzilla-daemon
2020-05-24 20:48 ` [libre-riscv-dev] [Bug 345] " bugzilla-daemon
2020-05-27 0:41 ` bugzilla-daemon
0 siblings, 2 replies; 3+ messages in thread
From: bugzilla-daemon @ 2020-05-24 14:55 UTC (permalink / raw)
To: libre-riscv-dev
https://bugs.libre-soc.org/show_bug.cgi?id=345
Bug ID: 345
Summary: define POWER9 regfiles
Product: Libre-SOC's first SoC
Version: unspecified
Hardware: PC
OS: Mac OS
Status: CONFIRMED
Severity: enhancement
Priority: ---
Component: Source Code
Assignee: lkcl@lkcl.net
Reporter: lkcl@lkcl.net
CC: libre-riscv-dev@lists.libre-riscv.org
NLnet milestone: ---
a series of regfiles are needed, with different characteristics and a common
API
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^ permalink raw reply [flat|nested] 3+ messages in thread* [libre-riscv-dev] [Bug 345] define POWER9 regfiles 2020-05-24 14:55 [libre-riscv-dev] [Bug 345] New: define POWER9 regfiles bugzilla-daemon @ 2020-05-24 20:48 ` " bugzilla-daemon 2020-05-27 0:41 ` bugzilla-daemon 1 sibling, 0 replies; 3+ messages in thread From: bugzilla-daemon @ 2020-05-24 20:48 UTC (permalink / raw) To: libre-riscv-dev https://bugs.libre-soc.org/show_bug.cgi?id=345 Luke Kenneth Casson Leighton <lkcl@lkcl.net> changed: What |Removed |Added ---------------------------------------------------------------------------- See Also| |https://bugs.libre-soc.org/ | |show_bug.cgi?id=333 -- You are receiving this mail because: You are on the CC list for the bug. _______________________________________________ libre-riscv-dev mailing list libre-riscv-dev@lists.libre-riscv.org http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev ^ permalink raw reply [flat|nested] 3+ messages in thread
* [libre-riscv-dev] [Bug 345] define POWER9 regfiles 2020-05-24 14:55 [libre-riscv-dev] [Bug 345] New: define POWER9 regfiles bugzilla-daemon 2020-05-24 20:48 ` [libre-riscv-dev] [Bug 345] " bugzilla-daemon @ 2020-05-27 0:41 ` bugzilla-daemon 1 sibling, 0 replies; 3+ messages in thread From: bugzilla-daemon @ 2020-05-27 0:41 UTC (permalink / raw) To: libre-riscv-dev https://bugs.libre-soc.org/show_bug.cgi?id=345 --- Comment #1 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> --- added XER and CR based on new VirtualRegPort. INT and FAST also added, based on RegFileArray that just leaves SPRs which are massive. may leave that for now. -- You are receiving this mail because: You are on the CC list for the bug. _______________________________________________ libre-riscv-dev mailing list libre-riscv-dev@lists.libre-riscv.org http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev ^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, back to index Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-05-24 14:55 [libre-riscv-dev] [Bug 345] New: define POWER9 regfiles bugzilla-daemon 2020-05-24 20:48 ` [libre-riscv-dev] [Bug 345] " bugzilla-daemon 2020-05-27 0:41 ` bugzilla-daemon
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