From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 353] formal proof of soc.regfile classes RegFile and RegFileArray needed
Date: Mon, 01 Jun 2020 17:51:28 +0000
Message-ID: <bug-353-13-rftYCepgHE@https.bugs.libre-soc.org/> (raw)
In-Reply-To: <bug-353-13@https.bugs.libre-soc.org/>
https://bugs.libre-soc.org/show_bug.cgi?id=353
--- Comment #31 from Michael Nolan <mtnolan2640@gmail.com> ---
(In reply to Michael Nolan from comment #30)
> I'm taking a look at regfile.py as well as the proof. Part of the reason you
> see everything failing is that the truth table in the proof isn't right; the
> register file doesn't have a defined output when read enable is low. I have
> an idea as to how to prove that register writes work, would you like me to
> write it or leave it up to you?
Actually, it turned out that the register file wasn't generating read and write
ports.
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Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-26 0:13 [libre-riscv-dev] [Bug 353] New: " bugzilla-daemon
2020-05-26 0:13 ` [libre-riscv-dev] [Bug 353] " bugzilla-daemon
2020-05-26 23:20 ` bugzilla-daemon
2020-05-27 4:12 ` bugzilla-daemon
2020-05-27 11:14 ` bugzilla-daemon
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2020-05-28 1:18 ` bugzilla-daemon
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2020-05-28 20:27 ` bugzilla-daemon
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2020-05-30 21:41 ` bugzilla-daemon
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2020-05-30 22:38 ` bugzilla-daemon
2020-05-31 14:12 ` bugzilla-daemon
2020-05-31 18:20 ` bugzilla-daemon
2020-06-01 17:06 ` bugzilla-daemon
2020-06-01 17:51 ` bugzilla-daemon [this message]
2020-06-01 17:52 ` bugzilla-daemon
2020-06-01 17:53 ` bugzilla-daemon
2020-06-01 17:55 ` bugzilla-daemon
2020-06-01 18:06 ` bugzilla-daemon
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