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From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 368] Need one example unit test of how to run some assembly code "qemu vs simulator" rather than "qemu vs hardware"
Date: Sun, 07 Jun 2020 22:34:22 +0000
Message-ID: <bug-368-13-9y5lrqJcAU@https.bugs.libre-soc.org/> (raw)
In-Reply-To: <bug-368-13@https.bugs.libre-soc.org/>

https://bugs.libre-soc.org/show_bug.cgi?id=368

Michael Nolan <mtnolan2640@gmail.com> changed:

           What    |Removed                     |Added
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                 CC|                            |mtnolan2640@gmail.com

--- Comment #1 from Michael Nolan <mtnolan2640@gmail.com> ---
Ok, I did this quite a while ago, testing against my crappy handwritten python
simulator. I'll give testing against the pseudocode simulator tomorrow a go.

Beware, from what I remember only general purpose registers work. qemu-gdb
seemed to have a bug (or maybe it's qemu? idk) where you couldn't read out XER,
CR, and friends directly from gdb.

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Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-07 22:31 [libre-riscv-dev] [Bug 368] New: " bugzilla-daemon
2020-06-07 22:34 ` bugzilla-daemon [this message]
2020-06-07 22:39 ` [libre-riscv-dev] [Bug 368] " bugzilla-daemon
2020-06-07 22:47 ` bugzilla-daemon
2020-06-07 22:48 ` bugzilla-daemon
2020-06-07 23:02 ` bugzilla-daemon
2020-06-08 17:48 ` bugzilla-daemon
2020-06-08 18:00 ` bugzilla-daemon
2020-06-08 18:31 ` bugzilla-daemon

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