From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 368] Need one example unit test of how to run some assembly code "qemu vs simulator" rather than "qemu vs hardware"
Date: Sun, 07 Jun 2020 22:39:53 +0000
Message-ID: <bug-368-13-fUUGB53IiE@https.bugs.libre-soc.org/> (raw)
In-Reply-To: <bug-368-13@https.bugs.libre-soc.org/>
https://bugs.libre-soc.org/show_bug.cgi?id=368
--- Comment #2 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
(In reply to Michael Nolan from comment #1)
> Ok, I did this quite a while ago, testing against my crappy handwritten
> python simulator. I'll give testing against the pseudocode simulator
> tomorrow a go.
that would be superb.
> Beware, from what I remember only general purpose registers work. qemu-gdb
> seemed to have a bug (or maybe it's qemu? idk) where you couldn't read out
> XER, CR, and friends directly from gdb.
hmmm... we could cheat, in a similar way to how gdb itself works: substitute
some instructions, actually execute mfcrf and mfmsr etc. directly putting
the result into a register, read *that*, then restore them afterwards.
or, it could just be that python-gdb doesn't have the capability added yet.
at least however if we can check int registers, then another hack-way to
do it would be to actually add, into the assembly listing being emulated,
the instruction to copy out to RT. it's a bad hack.
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Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-07 22:31 [libre-riscv-dev] [Bug 368] New: " bugzilla-daemon
2020-06-07 22:34 ` [libre-riscv-dev] [Bug 368] " bugzilla-daemon
2020-06-07 22:39 ` bugzilla-daemon [this message]
2020-06-07 22:47 ` bugzilla-daemon
2020-06-07 22:48 ` bugzilla-daemon
2020-06-07 23:02 ` bugzilla-daemon
2020-06-08 17:48 ` bugzilla-daemon
2020-06-08 18:00 ` bugzilla-daemon
2020-06-08 18:31 ` bugzilla-daemon
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