* [libre-riscv-dev] [Bug 383] New: Complete first functional POWER9 Core
@ 2020-06-14 18:23 bugzilla-daemon
2020-06-14 18:24 ` [libre-riscv-dev] [Bug 383] " bugzilla-daemon
0 siblings, 1 reply; 2+ messages in thread
From: bugzilla-daemon @ 2020-06-14 18:23 UTC (permalink / raw)
To: libre-riscv-dev
https://bugs.libre-soc.org/show_bug.cgi?id=383
Bug ID: 383
Summary: Complete first functional POWER9 Core
Product: Libre-SOC's first SoC
Version: unspecified
Hardware: Other
OS: Linux
Status: CONFIRMED
Severity: enhancement
Priority: ---
Component: Source Code
Assignee: lkcl@lkcl.net
Reporter: lkcl@lkcl.net
CC: libre-riscv-dev@lists.libre-riscv.org
NLnet milestone: ---
After the decision to implement POWER9 instead of RISC-V a full from-scratch
implementation of POWER9 was needed in nmigen. This to become the later basis
for adding Vectorisation, GPU and VPU instructions.
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2020-06-14 18:23 [libre-riscv-dev] [Bug 383] New: Complete first functional POWER9 Core bugzilla-daemon
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