[libre-riscv-dev] daily kan-ban update 03aug2020

[libre-riscv-dev] daily kan-ban update 03aug2020

[Luke Kenneth Casson Leighton]

tasks:

*
https://bugs.libre-soc.org/showdependencytree.cgi?id=383&maxdepth=1&hide_resolved=1

today:

* nmigen IRC meeting (in 15 mins)
* linked DMI interface to core and got reset, start and stop working.

i need to test single-step as well as add regfile reading and being able to
get MSR and the PC.

at that point i can modify the litex sim.py to put either core in
singlestep mode and dump out registers and the PC, sequentially.

l.



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Re: [libre-riscv-dev] daily kan-ban update 03aug2020

[Tobias Platen]

On Mon, 3 Aug 2020 18:46:46 +0100
Luke Kenneth Casson Leighton <lkcl@lkcl.net> wrote:

today:
	testcase for data merger based on the diagrams (still incomplete)
	reading https://bugs.libre-soc.org/show_bug.cgi?id=393
	reading DualPortSplitter and LDSTSplitter code
	


-- 
Tobias Platen <libre-soc[at]platen-software[dot]de>

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