From: Jacob Lifshay <programmerjake@gmail.com>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: [libre-riscv-dev] div pipe
Date: Sun, 19 Jul 2020 14:27:59 -0700
Message-ID: <CAC2bXD5pGGARmbWbD60B1WObECvRArFGak_prEQJ8p3+5H0jpQ@mail.gmail.com> (raw)
In-Reply-To: <CAPweEDwEQOb8_ZfxNsz14HEW+HMEc9-uq-awvuj0rtbnp3by9Q@mail.gmail.com>
On Sun, Jul 19, 2020, 14:12 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
wrote:
> btw jacob i'm aware i did exactly the same thing to the ieee754 div pipe! i
> did try running the div core unit tests, they weren't working. i didn't
> understand how to fix them so i proceeded anyway.
DivPipeCore broke because you forgot (or didn't know) to account for the
changing number of fractional bits when you changed the bit width for
supported={UDivRem}
I was working on fixing that but gave up since I'm planning on using the
FSM instead for the oct tapeout, and I'm planning on rewriting the div
pipeline to add dynamic partitioning and loop-back for the 28nm tapeout, so
the current div pipe core won't be needed. What we could do is just revert
the bitwidth changes if we want to have working code anyway.
Jacob
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Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-18 22:18 [libre-riscv-dev] lots of stuff broken Luke Kenneth Casson Leighton
2020-07-19 6:55 ` Jacob Lifshay
2020-07-19 10:46 ` Luke Kenneth Casson Leighton
2020-07-19 21:11 ` Luke Kenneth Casson Leighton
2020-07-19 21:27 ` Jacob Lifshay [this message]
2020-07-19 22:07 ` [libre-riscv-dev] div pipe Luke Kenneth Casson Leighton
2020-07-20 0:32 ` Jacob Lifshay
2020-07-20 1:38 ` Luke Kenneth Casson Leighton
2020-07-20 2:06 ` Jacob Lifshay
2020-07-20 2:13 ` Luke Kenneth Casson Leighton
2020-07-20 3:21 ` Jacob Lifshay
2020-07-20 10:31 ` Luke Kenneth Casson Leighton
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