From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] daily kan-ban update, 22jul2020
Date: Thu, 23 Jul 2020 18:11:39 +0100
Message-ID: <CAPweEDxnDyFcf8yMkCT6d75ToFkByHNaSbMPBSVa-7mzA6aLLw@mail.gmail.com> (raw)
In-Reply-To: <CAC2bXD61pYs-vZzduaZq0j-xovmgH+Xv188HTV6r1rUJB5TtpQ@mail.gmail.com>
On Thursday, July 23, 2020, Jacob Lifshay <programmerjake@gmail.com> wrote:
>
> for soc, we can copy the test case generation logic from DivPipeCore's
> tests in ieee754fpu since that covers waaay more cases (nicely
> exponentially distributed too) but is also deterministic. it covers the
> cases:
> for all 0 <= a < 2^8 and 0 <= b < 64:
> the case a << b if b < 64 - 8
> and the case ~(a << b) if b < 64 - 8
> and the case (1 << b) - 1
> and the case ~((1 << b) - 1)
ohh yeh i remember now.
> It might use a different value than 8 -- icr.
>
> this covers all the corner cases I can think of, which random testing has a
> very small chance of ever hitting
yehyeh this is why the ieee754fp tests have to have special cornercase
handling, zero, inf, nan etc.
(small enough that you'd need every
> person on the planet to all run the test on the order of a billion times
> each to hit the case once).
:)
we need a way to express these, cross language, so that they can be run in
multiple scenarios.
qemu, pia, ISACaller, HDL.
l.
--
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
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Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-23 0:13 Jacob Lifshay
2020-07-23 1:53 ` Cole Poirier
2020-07-23 2:29 ` Luke Kenneth Casson Leighton
2020-07-23 9:40 ` Luke Kenneth Casson Leighton
2020-07-23 16:31 ` Jacob Lifshay
2020-07-23 16:42 ` Luke Kenneth Casson Leighton
2020-07-23 17:06 ` Jacob Lifshay
2020-07-23 17:11 ` Luke Kenneth Casson Leighton [this message]
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