From: Yehowshua <yimmanuel3@gatech.edu>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] Fall 2022 Interfaces
Date: Fri, 12 Jun 2020 15:34:19 -0400
Message-ID: <D5B75159-31F2-4EA0-93F8-9382D6D6D64D@gatech.edu> (raw)
In-Reply-To: <CAPweEDxge6pt4yx18nHY0Y6-f3rDOAF_Dq70YzbCqg8ud_DQCQ@mail.gmail.com>
>
> no it really is 25GHz.
Just talked with an engineer who has used the OpenCAPI
SMC 100 from Microchip. It actually is 25GHz. 25.6 GHz to
be precise.
Some notes from my conversation with Michael:
>> from the ecp5 note on the serdes
>> - "3.2 Gbps operation with low 85
>> mW power per channel”
>
> Ok
> hmm
> channel i say 1rx or 1tx?
>
>> 1 tx/rx pair
>
>
> so 8 pairs at 3.2Gbps is about a watt
> Can't imagine for 25Gbps
>
>> Oh, and ecp5 is a 40nm chip
>> so it should be comparable to ours
>
>
> that’s what I’m afraid of
>
>
>> they might be targeting a different subprocess
>> than us though. I think most fabs offer the
>> options of like "low power", "high performance”,
>> or "high density"
>
>> and I suspect ours will need to be less flexible than the ecp5's so that might save us some power
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Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-12 2:59 Yehowshua
2020-06-12 3:00 ` Yehowshua
2020-06-12 4:01 ` Jacob Lifshay
2020-06-12 4:33 ` Cole Poirier
2020-06-12 5:46 ` Yehowshua
2020-06-12 7:07 ` Yehowshua
2020-06-12 11:03 ` Luke Kenneth Casson Leighton
2020-06-12 11:21 ` Luke Kenneth Casson Leighton
2020-06-12 12:38 ` Yehowshua
2020-06-12 13:30 ` Luke Kenneth Casson Leighton
2020-06-12 14:06 ` Hendrik Boom
2020-06-12 14:23 ` Cole Poirier
2020-06-12 19:34 ` Yehowshua [this message]
2020-06-12 19:43 ` Yehowshua
2020-06-12 21:42 ` Luke Kenneth Casson Leighton
2020-06-12 23:17 ` Jacob Lifshay
2020-06-13 0:10 ` Luke Kenneth Casson Leighton
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