From: Yehowshua <yimmanuel3@gatech.edu>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] Scoreboard vs Tomasulo
Date: Sat, 16 May 2020 20:47:05 -0400
Message-ID: <DDA79855-BBFB-4993-BB8A-7741F2C8DB29@gatech.edu> (raw)
In-Reply-To: <CAEoCstSGxwV88JUHTQmUp=75kHWxSZNSPu==_pxsUYf29ctd9w@mail.gmail.com>
> On May 16, 2020, at 6:45 PM, Jeremy Singher <thejsingher@gmail.com> wrote:
>
> Let me try to compose my thoughts.
> In order for OOO execution to be possible, write data from
> speculatively executed instructions must be buffered, for in the case
> of misspeculation, they must not be allowed to commit into the
> architectural register file.
This sounds correct to me.
> I think we will
> have to wait for power analysis of LibreSoC to get a definitive answer
> to this debate :).
Probably.
Yehowshua
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Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-16 14:04 Yehowshua
2020-05-16 15:00 ` Luke Kenneth Casson Leighton
2020-05-16 15:06 ` Luke Kenneth Casson Leighton
2020-05-16 15:13 ` Luke Kenneth Casson Leighton
2020-05-16 15:16 ` Luke Kenneth Casson Leighton
2020-05-16 15:19 ` Luke Kenneth Casson Leighton
2020-05-16 15:23 ` Luke Kenneth Casson Leighton
2020-05-16 15:52 ` Luke Kenneth Casson Leighton
2020-05-16 15:59 ` Yehowshua
2020-05-16 17:33 ` Luke Kenneth Casson Leighton
2020-05-16 20:16 ` Jeremy Singher
2020-05-16 21:37 ` Luke Kenneth Casson Leighton
2020-05-16 22:45 ` Jeremy Singher
2020-05-17 0:47 ` Yehowshua [this message]
2020-05-17 0:53 ` Luke Kenneth Casson Leighton
2020-05-17 5:24 ` [libre-riscv-dev] LD/ST Comp Unit FSM (was: Re: Scoreboard vs Tomasulo) Cesar Strauss
2020-05-17 10:07 ` Luke Kenneth Casson Leighton
2020-05-17 12:59 ` Cesar Strauss
2020-05-17 13:03 ` Luke Kenneth Casson Leighton
2020-05-17 22:23 ` Luke Kenneth Casson Leighton
2020-05-17 22:42 ` Cesar Strauss
2020-05-17 23:01 ` Luke Kenneth Casson Leighton
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