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* [libre-riscv-dev] [Bug 174] NLNet 2019 Formal Standards OpenPOWER proposal 2019-10-046
       [not found] <bug-174-13@https.bugs.libre-soc.org/>
@ 2020-04-15 12:14 ` bugzilla-daemon
  0 siblings, 0 replies; 2+ messages in thread
From: bugzilla-daemon @ 2020-04-15 12:14 UTC (permalink / raw)
  To: libre-riscv-dev

https://bugs.libre-soc.org/show_bug.cgi?id=174

Luke Kenneth Casson Leighton <lkcl@lkcl.net> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|CONFIRMED                   |IN_PROGRESS

--- Comment #5 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
received signed MoU from Bob Goudriaan at NLNet (with thanks and gratitude)

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* [libre-riscv-dev] [Bug 174] NLNet 2019 Formal Standards OpenPOWER proposal 2019-10-046
       [not found] <bug-174-13@http.bugs.libre-riscv.org/>
@ 2020-03-13 12:41 ` bugzilla-daemon
  0 siblings, 0 replies; 2+ messages in thread
From: bugzilla-daemon @ 2020-03-13 12:41 UTC (permalink / raw)
  To: libre-riscv-dev

http://bugs.libre-riscv.org/show_bug.cgi?id=174

--- Comment #4 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
# SimpleV

Budget: EUR 8000

# ISAMUX/NS 

Budget: 2500

# Atomics

Budget: 2500

# Variable Encoding

Budget: 2500

# Compressed

Budget: 5000

# FP16

Budget: 2500

# ISA Switch (POWER-RV64GC)

Budget: 3000

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2020-04-15 12:14 ` [libre-riscv-dev] [Bug 174] NLNet 2019 Formal Standards OpenPOWER proposal 2019-10-046 bugzilla-daemon
     [not found] <bug-174-13@http.bugs.libre-riscv.org/>
2020-03-13 12:41 ` bugzilla-daemon

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