[libre-riscv-dev] [Bug 258] New: Finish implementing support for Power in simple-soft-float

[libre-riscv-dev] [Bug 258] New: Finish implementing support for Power in simple-soft-float

[bugzilla-daemon]

http://bugs.libre-riscv.org/show_bug.cgi?id=258

            Bug ID: 258
           Summary: Finish implementing support for Power in
                    simple-soft-float
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: All
                OS: All
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: programmerjake@gmail.com
          Reporter: programmerjake@gmail.com
                CC: libre-riscv-dev@lists.libre-riscv.org
            Blocks: 241
   NLnet milestone: ---

need to finish implementing NaN payload propagation
need to implement additional non-standard FPU exceptions


Referenced Bugs:

http://bugs.libre-riscv.org/show_bug.cgi?id=241
[Bug 241] OpenPOWER SImulation is needed of standards
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[libre-riscv-dev] [Bug 258] Finish implementing support for Power in simple-soft-float

[bugzilla-daemon]

http://bugs.libre-riscv.org/show_bug.cgi?id=258

--- Comment #1 from Jacob Lifshay <programmerjake@gmail.com> ---
Just finished some refactoring in preparation for supporting Power's weird FP
status flags.

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Re: [libre-riscv-dev] [Bug 258] Finish implementing support for Power in simple-soft-float

[Luke Kenneth Casson Leighton]

On Wednesday, March 18, 2020, <bugzilla-daemon@libre-riscv.org> wrote:

> http://bugs.libre-riscv.org/show_bug.cgi?id=258
>
> --- Comment #1 from Jacob Lifshay <programmerjake@gmail.com> ---
> Just finished some refactoring in preparation for supporting Power's weird
> FP
> status flags.


 the FP HDL needs a big update to bring out status bits.  then another one
to add rounding modes, which is quite a bit of work.

l.



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Re: [libre-riscv-dev] [Bug 258] Finish implementing support for Power in simple-soft-float

[Jacob Lifshay]

On Tue, Mar 17, 2020, 23:58 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
wrote:

> On Wednesday, March 18, 2020, <bugzilla-daemon@libre-riscv.org> wrote:
>
> > http://bugs.libre-riscv.org/show_bug.cgi?id=258
> >
> > --- Comment #1 from Jacob Lifshay <programmerjake@gmail.com> ---
> > Just finished some refactoring in preparation for supporting Power's
> weird
> > FP
> > status flags.
>
>
>  the FP HDL needs a big update to bring out status bits.  then another one
> to add rounding modes, which is quite a bit of work.
>

Adding status bits and adding rounding modes should be done together,
because they are closely interrelated, especially inexact and underflow.

If you do them separately, you will only be making more work for yourself.

Jacob
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[libre-riscv-dev] [Bug 258] Finish implementing support for Power in simple-soft-float

[bugzilla-daemon]

http://bugs.libre-riscv.org/show_bug.cgi?id=258

--- Comment #2 from Jacob Lifshay <programmerjake@gmail.com> ---
Finished updating for latest version of PyO3 and algebraics

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[libre-riscv-dev] [Bug 258] Finish implementing support for Power in simple-soft-float

[bugzilla-daemon]

http://bugs.libre-riscv.org/show_bug.cgi?id=258

--- Comment #3 from Jacob Lifshay <programmerjake@gmail.com> ---
So you know, simple-soft-float's StatusFlags is getting lots of new flags and
some of the existing flags will become aliases for groups of flags, where
writing will write to all flags in the group and reading will get the logical
OR of all flags in the group.

Some of the new flags won't be persistent -- they will be overwritten by every
operation -- unlike the standard flags which all stay at 1 (unless explicitly
cleared).

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[libre-riscv-dev] [Bug 258] Finish implementing support for Power in simple-soft-float

[bugzilla-daemon]

http://bugs.libre-riscv.org/show_bug.cgi?id=258

Luke Kenneth Casson Leighton <lkcl@lkcl.net> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |lkcl@lkcl.net

--- Comment #4 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
(In reply to Jacob Lifshay from comment #3)
> So you know, simple-soft-float's StatusFlags is getting lots of new flags
> and some of the existing flags will become aliases for groups of flags,
> where writing will write to all flags in the group and reading will get the
> logical OR of all flags in the group.
> 
> Some of the new flags won't be persistent -- they will be overwritten by
> every operation -- unlike the standard flags which all stay at 1 (unless
> explicitly cleared).

ok appreciated.  the next step will be writing as close a drop-in replacement
for sfpy as we can get.  once sfpy is replaced as a dependency we can add new
flags etc.  if those are in one place (a test helper routine / class) that
minimises disruption and makes it easy to add features to ssf.

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