From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 333] investigate why CR pipeline code took 100% CPU and locked up generating ILANG
Date: Thu, 21 May 2020 17:46:02 +0000
Message-ID: <bug-333-13-66RxvMrBnT@https.bugs.libre-soc.org/> (raw)
In-Reply-To: <bug-333-13@https.bugs.libre-soc.org/>
https://bugs.libre-soc.org/show_bug.cgi?id=333
--- Comment #14 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #12)
> (In reply to Michael Nolan from comment #11)
> > Luke, there's not a way to do something like a C union in nmigen is there?
>
> no, you just push bits around. it's up to the recipient to have the
> required state to correctly interpret them.
everything in nmigen comes with an implicit typecast to void* ... :)
whitequark would very much like to fix this. we actually use it in a lot of
places.
however the fix is a massive systematic fundamental design rewrite and would
involve introducing c-like unions.
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Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-20 17:55 [libre-riscv-dev] [Bug 333] New: " bugzilla-daemon
2020-05-20 18:16 ` [libre-riscv-dev] [Bug 333] " bugzilla-daemon
2020-05-20 18:37 ` bugzilla-daemon
2020-05-20 18:45 ` bugzilla-daemon
2020-05-20 18:52 ` bugzilla-daemon
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2020-05-20 19:39 ` bugzilla-daemon
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2020-05-20 19:46 ` bugzilla-daemon
2020-05-21 2:05 ` bugzilla-daemon
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2020-05-21 17:39 ` bugzilla-daemon
2020-05-21 17:46 ` bugzilla-daemon [this message]
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2020-05-22 13:36 ` bugzilla-daemon
2020-05-22 13:49 ` bugzilla-daemon
2020-05-24 20:48 ` bugzilla-daemon
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