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From: bugzilla-daemon@libre-soc.org
To: libre-riscv-dev@lists.libre-riscv.org
Subject: [libre-riscv-dev] [Bug 350] New: LDSTCompUnit also needs to support zeroing on RA
Date: Mon, 25 May 2020 00:13:41 +0000
Message-ID: <bug-350-13@https.bugs.libre-soc.org/> (raw)

https://bugs.libre-soc.org/show_bug.cgi?id=350

            Bug ID: 350
           Summary: LDSTCompUnit also needs to support zeroing on RA
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: Other
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: lkcl@lkcl.net
          Reporter: lkcl@lkcl.net
                CC: libre-riscv-dev@lists.libre-riscv.org
   NLnet milestone: ---

https://libre-soc.org/openpower/isa/fixedload/

noted that zeroing on RA is possible

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Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-25  0:13 bugzilla-daemon [this message]
2020-05-25  0:14 ` [libre-riscv-dev] [Bug 350] " bugzilla-daemon
2020-05-25  0:14 ` bugzilla-daemon
2020-05-25  4:03 ` bugzilla-daemon
2020-05-25 11:46 ` bugzilla-daemon
2020-05-25 11:57 ` bugzilla-daemon
2020-05-28 10:44 ` bugzilla-daemon

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