[libre-riscv-dev] [Bug 355] New: game theory "state" packet engine needed

[libre-riscv-dev] [Bug 355] New: game theory "state" packet engine needed

[bugzilla-daemon]

https://bugs.libre-soc.org/show_bug.cgi?id=355

            Bug ID: 355
           Summary: game theory "state" packet engine needed
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: Other
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: lkcl@lkcl.net
          Reporter: lkcl@lkcl.net
                CC: libre-riscv-dev@lists.libre-riscv.org
   NLnet milestone: ---

it occurred to me that the branch system etc. is basically running game theory
(in hardware), running new "state" ahead.

the program counter, DEC SPR, and TB SPR, these all increment and need rollback
in a group.  there may also be other pieces of state information involved.

my feeling is that we will need a ring buffer, associated with the instruction
queue (or actually part of it) that contains each advancement of that state,
and thus we can roll it back without losing anything.

perhaps it is as simple as adding DEC and TB to the Decode2ExecuteType data
structure?

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[libre-riscv-dev] [Bug 355] game theory "state" packet engine needed

[bugzilla-daemon]

https://bugs.libre-soc.org/show_bug.cgi?id=355

--- Comment #1 from Luke Kenneth Casson Leighton <lkcl@lkcl.net> ---
some possible ideas which preserve the state/context:

* a ring buffer with the instruction, TB, DEC and other context as entries is
created.  the index of the ring buffer entry is passed down the pipeline "ctx"
(context)

* TB, PC and DEC are passed into "ctx".  as this is 3x 64 bit that is an awful
lot, it will be copied right the way through the pipelines (and not actually
change or be used).

* a separate instruction queue and a separate ring buffer for state.

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