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* [libre-riscv-dev] [Bug 362] New: improvements to nmigen and yosys
@ 2020-06-04 13:40 bugzilla-daemon
  2020-06-04 13:42 ` [libre-riscv-dev] [Bug 362] " bugzilla-daemon
  2020-06-06 23:55 ` bugzilla-daemon
  0 siblings, 2 replies; 3+ messages in thread
From: bugzilla-daemon @ 2020-06-04 13:40 UTC (permalink / raw)
  To: libre-riscv-dev

https://bugs.libre-soc.org/show_bug.cgi?id=362

            Bug ID: 362
           Summary: improvements to nmigen and yosys
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: lkcl@lkcl.net
          Reporter: lkcl@lkcl.net
                CC: libre-riscv-dev@lists.libre-riscv.org
   NLnet milestone: ---

improvements to nmigen and yosys are needed, including CXXSim, a
new backend for yosys that allows a 20 to 100x performance increase
in simulation speed.

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^ permalink raw reply	[flat|nested] 3+ messages in thread

* [libre-riscv-dev] [Bug 362] improvements to nmigen and yosys
  2020-06-04 13:40 [libre-riscv-dev] [Bug 362] New: improvements to nmigen and yosys bugzilla-daemon
@ 2020-06-04 13:42 ` " bugzilla-daemon
  2020-06-06 23:55 ` bugzilla-daemon
  1 sibling, 0 replies; 3+ messages in thread
From: bugzilla-daemon @ 2020-06-04 13:42 UTC (permalink / raw)
  To: libre-riscv-dev

https://bugs.libre-soc.org/show_bug.cgi?id=362

Luke Kenneth Casson Leighton <lkcl@lkcl.net> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
    NLnet milestone|---                         |NLNet.2019.10.Wishbone
 total budget (EUR)|0                           |10000
  for completion of|                            |
       task and all|                            |
           subtasks|                            |
    parent task for|                            |175
  budget allocation|                            |

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^ permalink raw reply	[flat|nested] 3+ messages in thread

* [libre-riscv-dev] [Bug 362] improvements to nmigen and yosys
  2020-06-04 13:40 [libre-riscv-dev] [Bug 362] New: improvements to nmigen and yosys bugzilla-daemon
  2020-06-04 13:42 ` [libre-riscv-dev] [Bug 362] " bugzilla-daemon
@ 2020-06-06 23:55 ` bugzilla-daemon
  1 sibling, 0 replies; 3+ messages in thread
From: bugzilla-daemon @ 2020-06-06 23:55 UTC (permalink / raw)
  To: libre-riscv-dev

https://bugs.libre-soc.org/show_bug.cgi?id=362

Luke Kenneth Casson Leighton <lkcl@lkcl.net> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   budget (EUR) for|0                           |6000
 completion of task|                            |
   (excludes budget|                            |
       allocated to|                            |
          subtasks)|                            |

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^ permalink raw reply	[flat|nested] 3+ messages in thread

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2020-06-04 13:40 [libre-riscv-dev] [Bug 362] New: improvements to nmigen and yosys bugzilla-daemon
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2020-06-06 23:55 ` bugzilla-daemon

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