From: Jean-Paul Chaput <Jean-Paul.Chaput@lip6.fr>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] Advanced Topics on RISCV
Date: Tue, 24 Mar 2020 14:08:33 +0100
Message-ID: <c460ee198d5dbee2b4969b040bca63ef5a8ad6f4.camel@lip6.fr> (raw)
In-Reply-To: <48389673-AD71-4168-8116-135C1D419634@gatech.edu>
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On Tue, 2020-03-24 at 13:00 +0000, Immanuel, Yehowshua U wrote:
> > You can see details here:
> > https://www-soc.lip6.fr/trac/tsar
>
> Thanks, I see that it scales up to 1024 - that's fantastic.
Yes. Even above that. We did use free tools for the HDL,
but unusual ones. So maybe you should concentrate on the
theoretical mechanisms and avoid banging your head on the
tools themselves. The prototype, If I remember correctly
is made in 28nm with on MIPS32 processors.
The chip was implemented with Cadence however. But the
HDL models are free.
We have run NetBSD and Linux on it.
--
.-. J e a n - P a u l C h a p u t / Administrateur Systeme
/v\ Jean-Paul.Chaput@lip6.fr
/(___)\ work: (33) 01.44.27.53.99
^^ ^^ cell: 06.66.25.35.55 home: 09.65.29.83.38
U P M C Universite Pierre & Marie Curie
L I P 6 Laboratoire d'Informatique de Paris VI
S o C System On Chip
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Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-24 11:51 Immanuel, Yehowshua U
2020-03-24 12:06 ` Luke Kenneth Casson Leighton
2020-03-24 12:58 ` Immanuel, Yehowshua U
2020-03-24 12:23 ` Jean-Paul Chaput
2020-03-24 13:00 ` Immanuel, Yehowshua U
2020-03-24 13:08 ` Jean-Paul Chaput [this message]
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