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From: Michael Nolan <mtnolan2640@gmail.com>
To: libre-riscv-dev@lists.libre-riscv.org
Subject: Re: [libre-riscv-dev] daily kan-ban update 12may2020
Date: Tue, 12 May 2020 10:28:58 -0400
Message-ID: <dafc0660-613f-d9d4-ee5c-2f3ab0bb7475@gmail.com> (raw)
In-Reply-To: <CAPweEDy9Kby79pBzaCQz6_Tt9hPcCkgBuGBj6S=eiALM0Ww9Zg@mail.gmail.com>

Yesterday I modified the ALU tests to read the alu inputs as specified 
in the instruction instead of hardcoded register numbers. I refactored 
the test to greatly reduce the amount of time it takes to run (went from 
~1m to ~3s on my computer)

Today I'd like to split out the shift and rotate instructions into their 
own separate FU

--Michael


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  parent reply index

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-12 10:45 Luke Kenneth Casson Leighton
2020-05-12 14:00 ` Tobias Platen
2020-05-12 14:28 ` Michael Nolan [this message]
2020-05-12 14:53   ` Luke Kenneth Casson Leighton
2020-05-12 14:42 ` Yehowshua
2020-05-12 15:03   ` Luke Kenneth Casson Leighton
2020-05-13 17:49     ` [libre-riscv-dev] teaching the benefits of using nmigen over VHDL/Verilog Jacob Lifshay
2020-05-13 18:18       ` Luke Kenneth Casson Leighton
2020-05-13 18:51         ` Michael Nolan
2020-05-13 19:02           ` Jacob Lifshay
2020-05-13 19:54           ` Luke Kenneth Casson Leighton

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