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From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
Subject: Re: [libre-riscv-dev] morphing 6600 code to use power decoder
Date: Fri, 10 Apr 2020 16:01:41 +0100
Message-ID: <CAPweEDxaZhpjimhOqt5+cyQmezm9b6N-i3aVE8r2UdYco8EyBA@mail.gmail.com> (raw)
In-Reply-To: <CAPweEDzz4=cd90=e21oYZn1OphRpcFsoWhLf0aMoTtJnjOcFMA@mail.gmail.com>

okaay, i have a first successful - one instruction (an add) -
execution of an "internal op" which is manually placed into the
instruction queue.  adding the POWER decoder in front of that should
be a trivial exercise.

the code's been... messed about somewhat, to get it functional, and
the LDST and Branch Comp Units also need converting.  however the core
out-of-order engine remains exactly the same, so this again should
just be a straightforward exercise.

we do need to write a "proper" Integer ALU - one that uses
PartitionedSignal for operations.  this will be where all the pieces
and hard work that everyone's put in will gel together.

l.

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Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-08 13:26 Luke Kenneth Casson Leighton
2020-04-09  0:47 ` whygee
2020-04-09  1:21   ` Luke Kenneth Casson Leighton
2020-04-10 15:01     ` Luke Kenneth Casson Leighton [this message]
2020-04-11 11:20       ` Luke Kenneth Casson Leighton
2020-04-12 12:32         ` Luke Kenneth Casson Leighton
2020-04-13 14:16           ` Luke Kenneth Casson Leighton
2020-04-13 17:46             ` whygee
2020-04-13 18:27               ` Luke Kenneth Casson Leighton
2020-04-14 19:12                 ` Luke Kenneth Casson Leighton
2020-04-16 12:19                   ` Luke Kenneth Casson Leighton
2020-04-16 15:41                     ` Luke Kenneth Casson Leighton
2020-04-18 11:06                       ` Luke Kenneth Casson Leighton
2020-04-23 17:16                         ` Luke Kenneth Casson Leighton
2020-04-24 20:11                           ` Luke Kenneth Casson Leighton

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